main: add latest experimentation code

no longer required.

Cargo.lock

@@ -15,11 +15,6 @@ name = "byteorder"
 version = "1.3.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 
-[[package]]
-name = "compiler_builtins"
-version = "0.1.20"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-
 [[package]]
 name = "linked_list_allocator"
 version = "0.6.4"
@@ -63,7 +58,6 @@ name = "zc706"
 version = "0.0.0"
 dependencies = [
  "bit_field 0.10.0 (registry+https://github.com/rust-lang/crates.io-index)",
- "compiler_builtins 0.1.20 (registry+https://github.com/rust-lang/crates.io-index)",
  "linked_list_allocator 0.6.4 (registry+https://github.com/rust-lang/crates.io-index)",
  "r0 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)",
  "smoltcp 0.5.0 (git+https://github.com/m-labs/smoltcp.git?rev=8eb01aca364aefe5f823d68d552d62c76c9be4a3)",
@@ -75,7 +69,6 @@ dependencies = [
 "checksum bit_field 0.10.0 (registry+https://github.com/rust-lang/crates.io-index)" = "a165d606cf084741d4ac3a28fb6e9b1eb0bd31f6cd999098cfddb0b2ab381dc0"
 "checksum bitflags 1.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "3d155346769a6855b86399e9bc3814ab343cd3d62c7e985113d46a0ec3c281fd"
 "checksum byteorder 1.3.2 (registry+https://github.com/rust-lang/crates.io-index)" = "a7c3dd8985a7111efc5c80b44e23ecdd8c007de8ade3b96595387e812b957cf5"
-"checksum compiler_builtins 0.1.20 (registry+https://github.com/rust-lang/crates.io-index)" = "33494057c5a6c59def611805f1f8cd0ea485dbfd58126e9a05135f400634c527"
 "checksum linked_list_allocator 0.6.4 (registry+https://github.com/rust-lang/crates.io-index)" = "47314ec1d29aa869ee7cb5a5be57be9b1055c56567d59c3fb6689926743e0bea"
 "checksum managed 0.7.1 (registry+https://github.com/rust-lang/crates.io-index)" = "fdcec5e97041c7f0f1c5b7d93f12e57293c831c646f4cc7a5db59460c7ea8de6"
 "checksum r0 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)" = "e2a38df5b15c8d5c7e8654189744d8e396bddc18ad48041a500ce52d6948941f"

Cargo.toml

@@ -11,6 +11,8 @@ lto = false
 [profile.release]
 panic = "abort"
 debug = true
+lto = true  # Link-Time Optimization
+opt-level = 'z'  # Optimize for size.
 
 [features]
 target_zc706 = []
@@ -22,7 +24,6 @@ r0 = "0.2"
 vcell = "0.1"
 volatile-register = "0.2"
 bit_field = "0.10"
-compiler_builtins = { version = "~0.1", default-features = false, features = ["mem", "no-lang-items"]}
 linked_list_allocator = { version = "0.6", default-features = false }
 
 [dependencies.smoltcp]

src/cortex_a9/mmu.rs

@@ -124,7 +124,7 @@ impl L1Table {
             tex: 0b101,
             domain: 0b1111,
             exec: true,
-            cacheable: false,
+            cacheable: true,
             bufferable: true,
         });
         /* (DDR cacheable) */

src/main.rs

@@ -5,17 +5,19 @@
 #![feature(naked_functions)]
 #![feature(never_type)]
 #![feature(alloc_error_handler)]
+#![feature(panic_info_message)]
 // TODO: disallow unused/dead_code when code moves into a lib crate
 #![allow(dead_code)]
 
 extern crate alloc;
+
 use alloc::{vec, vec::Vec};
 use core::mem::transmute;
-use compiler_builtins as _;
 use smoltcp::wire::{EthernetAddress, IpAddress, IpCidr};
 use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder};
 use smoltcp::time::Instant;
 use smoltcp::socket::SocketSet;
+use smoltcp::socket::{TcpSocket, TcpSocketBuffer};
 
 mod boot;
 mod regs;
@@ -25,11 +27,17 @@ mod panic;
 mod zynq;
 mod stdio;
 mod ram;
+use cortex_a9::mutex::Mutex;
 
 const HWADDR: [u8; 6] = [0, 0x23, 0xde, 0xea, 0xbe, 0xef];
 
+static mut STACK_CORE1: [u32; 512] = [0; 512];
+
 pub fn main() {
+    // zynq::clocks::CpuClocks::enable_io(1_250_000_000);
     println!("\nzc706 main");
+    use regs::RegisterR;
+    println!("Boot mode: {:?}", zynq::slcr::RegisterBlock::new().boot_mode.read().boot_mode_pins());
 
     let mut flash = zynq::flash::Flash::new(200_000_000).linear_addressing_mode();
     let flash_ram: &[u8] = unsafe { core::slice::from_raw_parts(flash.ptr(), flash.size()) };
@@ -43,30 +51,71 @@ pub fn main() {
     let mut flash = flash.stop();
 
     let mut ddr = zynq::ddr::DdrRam::new();
-    println!("DDR: {:?}", ddr.status());
+    #[cfg(not(feature = "target_zc706"))]
     ddr.memtest();
     ram::init_alloc(&mut ddr);
 
     for i in 0..=1 {
         let mut flash_io = flash.manual_mode(i);
+        // println!("rdcr={:02X}", flash_io.rdcr());
         print!("Flash {} ID:", i);
         for b in flash_io.rdid() {
             print!(" {:02X}", b);
         }
         println!("");
         print!("Flash {} I/O:", i);
-        for o in 0..4 {
-            for b in flash_io.read(32 * o, 32) {
+        for o in 0..8 {
+            const CHUNK: u32 = 8;
+            for b in flash_io.read(CHUNK * o, CHUNK as usize) {
                 print!(" {:02X}", b);
             }
         }
         println!("");
+
+        flash_io.dump("Read cr1", 0x35);
+        flash_io.dump("Read Autoboot", 0x14);
+        flash_io.dump("Read Bank", 0x16);
+        flash_io.dump("DLP Bank", 0x16);
+        flash_io.dump("Read ESig", 0xAB);
+        flash_io.dump("OTP Read", 0x4B);
+        flash_io.dump("DYB Read", 0xE0);
+        flash_io.dump("PPB Read", 0xE2);
+        flash_io.dump("ASP Read", 0x2B);
+        flash_io.dump("Password Read", 0xE7);
+
+        flash_io.write_enabled(|flash_io| {
+            flash_io.erase(0);
+        });
+        flash_io.write_enabled(|flash_io| {
+            flash_io.program(0, [0x23054223; (0x100 >> 2)].iter().cloned());
+        });
+
         flash = flash_io.stop();
     }
-    
-    let core1_stack = vec![0; 2048];
+
+    let core1_stack = unsafe { &mut STACK_CORE1[..] };
     println!("{} bytes stack for core1", core1_stack.len());
-    boot::Core1::start(core1_stack);
+    let core1 = boot::Core1::start(core1_stack);
+
+    for _ in 0..0x1000000 {
+        let mut l = SHARED.lock();
+        *l += 1;
+    }
+    while !*DONE.lock() {
+        let x = { *SHARED.lock() };
+        println!("shared: {:08X}", x);
+    }
+    let x = { *SHARED.lock() };
+    println!("done shared: {:08X}", x);
+
+    core1.stop();
+
+    cortex_a9::asm::dsb();
+    print!("Core1 stack [{:08X}..{:08X}]:", &core1.stack[0] as *const _ as u32, &core1.stack[core1.stack.len() - 1] as *const _ as u32);
+    for w in core1.stack {
+        print!(" {:08X}", w);
+    }
+    println!(".");
 
     let eth = zynq::eth::Eth::default(HWADDR.clone());
     println!("Eth on");
@@ -108,6 +157,16 @@ pub fn main() {
     ];
     let mut sockets = SocketSet::new(&mut sockets_storage[..]);
 
+    // taken from example code for smoltcp
+    let mut tcp_server_rx_data = vec![0; 512 * 1024];
+    let mut tcp_server_tx_data = vec![0; 512 * 1024];
+    let tcp_rx_buffer = TcpSocketBuffer::new(&mut tcp_server_rx_data[..]);
+    let tcp_tx_buffer = TcpSocketBuffer::new(&mut tcp_server_tx_data[..]);
+    let tcp_socket = TcpSocket::new(tcp_rx_buffer, tcp_tx_buffer);
+    let tcp_handle = sockets.add(tcp_socket);
+    /// `chargen`
+    const TCP_PORT: u16 = 19;
+
     let mut time = 0u32;
     loop {
         time += 1;
@@ -120,36 +179,41 @@ pub fn main() {
             }
         }
 
-        // match eth.recv_next() {
-        //     Ok(Some(pkt)) => {
-        //         print!("eth: rx {} bytes", pkt.len());
-        //         for b in pkt.iter() {
-        //             print!(" {:02X}", b);
-        //         }
-        //         println!("");
-        //     }
-        //     Ok(None) => {}
-        //     Err(e) => {
-        //         println!("eth rx error: {:?}", e);
-        //     }
-        // }
+        // (mostly) taken from smoltcp example: TCP echo server
+        let mut socket = sockets.get::<TcpSocket>(tcp_handle);
+        if !socket.is_open() {
+            socket.listen(TCP_PORT).unwrap()
+        }
+        if socket.may_recv() && socket.can_send() {
+            socket.recv(|buf| {
+                let len = buf.len().min(4096);
+                let buffer = buf[..len].iter().cloned().collect::<Vec<_>>();
+                (len, buffer)
+            })
+                .and_then(|buffer| socket.send_slice(&buffer[..]))
+                .map(|_| {})
+                .unwrap_or_else(|e| println!("tcp: {:?}", e));
 
-        // match eth.send(512) {
-        //     Some(mut pkt) => {
-        //         let mut x = 0;
-        //         for b in pkt.iter_mut() {
-        //             *b = x;
-        //             x += 1;
-        //         }
-        //         println!("eth tx {} bytes", pkt.len());
-        //     }
-        //     None => println!("eth tx shortage"),
-        // }
+        }
     }
 
+    // #[allow(unreachable_code)]
+    // drop(tx_descs);
+    // #[allow(unreachable_code)]
+    // drop(tx_buffers);
 }
 
+static SHARED: Mutex<u32> = Mutex::new(0);
+static DONE: Mutex<bool> = Mutex::new(false);
+
 pub fn main_core1() {
     println!("Hello from core1!");
+    for _ in 0..0x1000000 {
+        let mut l = SHARED.lock();
+        *l += 1;
+    }
+    println!("core1 done!");
+    *DONE.lock() = true;
+
     loop {}
 }

src/panic.rs

@@ -1,8 +1,18 @@
-use crate::{println, zynq};
+use crate::{print, println, zynq};
 
 #[panic_handler]
 fn panic(info: &core::panic::PanicInfo) -> ! {
-    println!("\nPanic: {}", info);
+    print!("panic at ");
+    if let Some(location) = info.location() {
+        print!("{}:{}:{}", location.file(), location.line(), location.column());
+    } else {
+        print!("unknown location");
+    }
+    if let Some(message) = info.message() {
+        println!(": {}", message);
+    } else {
+        println!("");
+    }
 
     zynq::slcr::RegisterBlock::unlocked(|slcr| slcr.soft_reset());
     loop {}

src/zynq/flash/mod.rs

@@ -494,3 +494,13 @@ impl Flash<Manual> {
         Transfer::new(self, args, len)
     }
 
+    pub fn dump(&mut self, label: &'_ str, inst_code: u8) {
+        print!("{}:", label);
+
+        let args = Some(u32::from(inst_code) << 24);
+        for b in self.transfer(args.into_iter(), 32).bytes_transfer() {
+            print!(" {:02X}", b);
+        }
+        println!("");
+    }
+}