vexriscv-rust/Cargo.toml

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[package]
name = "vexriscv"
version = "0.0.2"
repository = "https://github.com/xobs/vexriscv-rust"
authors = ["Sean Cross <sean@xobs.io>", "The RISC-V Team <risc-v@teams.rust-embedded.org>"]
categories = ["embedded", "hardware-support", "no-std"]
description = "Low level access to the VexRiscv processor"
keywords = ["riscv", "register", "peripheral", "vexriscv"]
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license = "ISC"
[dependencies]
bare-metal = ">=0.2.0,<0.2.5"
bit_field = "0.9.0"
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[features]
inline-asm = []