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vexriscv-rust/Cargo.toml

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Initial commit.
2017-09-19 22:04:12 +08:00
[package]
vexriscv: clone from riscv crate Base the vexriscv crate on the riscv crate, but add vexriscv-specific instructions. Signed-off-by: Sean Cross <sean@xobs.io>
2019-12-28 18:11:12 +08:00
name = "vexriscv"
cargo: bump version to 0.0.2 This version adds vexriscv-specific registers. Signed-off-by: Sean Cross <sean@xobs.io>
2020-01-08 17:23:05 +08:00
version = "0.0.2"
vexriscv: clone from riscv crate Base the vexriscv crate on the riscv crate, but add vexriscv-specific instructions. Signed-off-by: Sean Cross <sean@xobs.io>
2019-12-28 18:11:12 +08:00
repository = "https://github.com/xobs/vexriscv-rust"
authors = ["Sean Cross <sean@xobs.io>", "The RISC-V Team <risc-v@teams.rust-embedded.org>"]
cargo: remove `vexriscv` category Apparently categories are fixed, and vexriscv isn't a category. Signed-off-by: Sean Cross <sean@xobs.io>
2019-12-28 18:14:52 +08:00
categories = ["embedded", "hardware-support", "no-std"]
vexriscv: clone from riscv crate Base the vexriscv crate on the riscv crate, but add vexriscv-specific instructions. Signed-off-by: Sean Cross <sean@xobs.io>
2019-12-28 18:11:12 +08:00
description = "Low level access to the VexRiscv processor"
keywords = ["riscv", "register", "peripheral", "vexriscv"]
Initial commit.
2017-09-19 22:04:12 +08:00
license = "ISC"
Add inline-asm feature.
2018-08-12 13:56:17 +08:00
[features]
vexriscv: clone from riscv crate Base the vexriscv crate on the riscv crate, but add vexriscv-specific instructions. Signed-off-by: Sean Cross <sean@xobs.io>
2019-12-28 18:11:12 +08:00
inline-asm = []