28 lines
824 B
Markdown
28 lines
824 B
Markdown
# rtio-nmigen
|
|
|
|
Formally verified implementation of the ARTIQ RTIO core in nMigen
|
|
|
|
## Progress
|
|
|
|
- [ ] Implement the core in nMigen
|
|
- - [ ] `artiq.gateware.rtio.core`
|
|
- - [ ] `misoc.interconnect.csr`
|
|
- - [ ] `artiq.gateware.rtio.cri`
|
|
- - [ ] `artiq.gateware.rtio.rtlink`
|
|
- - [ ] `artiq.gateware.rtio.channel`
|
|
- - [ ] `artiq.gateware.rtio.sed.core`
|
|
- - [ ] `artiq.gateware.rtio.sed.layouts`
|
|
- - [ ] `artiq.gateware.rtio.sed.lane_distributor`
|
|
- - [ ] `artiq.gateware.rtio.sed.fifos`
|
|
- - [ ] `artiq.gateware.rtio.sed.gates`
|
|
- - [ ] `artiq.gateware.rtio.sed.output_driver`
|
|
- - [ ] `artiq.gateware.rtio.sed.output_network`
|
|
- - [ ] `artiq.gateware.rtio.input_collector`
|
|
- [ ] Add suitable assertions for verification (BMC / unbounded proof?)
|
|
|
|
## License
|
|
|
|
Copyright (C) 2020 M-Labs Limited.
|
|
|
|
[LGPLv3](./LICENSE) or any later version
|