Fix assertions for no replacements case

This commit is contained in:
Donald Sebastian Leung 2020-10-21 14:03:35 +08:00
parent b7a69557de
commit 96d470921b
1 changed files with 18 additions and 19 deletions

View File

@ -145,25 +145,24 @@ class OutputNetwork(Elaboratable):
with m.If(k1 == k2): with m.If(k1 == k2):
m.d.comb += nodes_unique.eq(0) m.d.comb += nodes_unique.eq(0)
m.d.comb += Assert(nodes_unique) m.d.comb += Assert(nodes_unique)
# TODO: figure out why the rest is failing for input_node in self.input:
# appeared = Signal(len(self.input)) appeared = Signal()
# for input_node in range(len(self.input)): for output_node in self.output:
# for output_node in self.output: match = Signal(reset=1)
# identical = Signal(reset=1) with m.If(Past(input_node.valid, clocks=network_latency) != output_node.valid):
# with m.If(Past(self.input[input_node].valid, clocks=network_latency) != output_node.valid): m.d.comb += match.eq(0)
# m.d.comb += identical.eq(0) with m.If(Past(input_node.seqn, clocks=network_latency) != output_node.seqn):
# with m.If(Past(self.input[input_node].seqn, clocks=network_latency) != output_node.seqn): m.d.comb += match.eq(0)
# m.d.comb += identical.eq(0) with m.If(Past(input_node.replace_occured, clocks=network_latency) != output_node.replace_occured):
# with m.If(Past(self.input[input_node].replace_occured, clocks=network_latency) != output_node.replace_occured): m.d.comb += match.eq(0)
# m.d.comb += identical.eq(0) with m.If(Past(input_node.nondata_replace_occured, clocks=network_latency) != output_node.nondata_replace_occured):
# with m.If(Past(self.input[input_node].nondata_replace_occured, clocks=network_latency) != output_node.nondata_replace_occured): m.d.comb += match.eq(0)
# m.d.comb += identical.eq(0) for field, _ in layout_payload:
# for field, _ in layout_payload: with m.If(Past(getattr(input_node.payload, field), clocks=network_latency) != getattr(output_node.payload, field)):
# with m.If(Past(getattr(self.input[input_node].payload, field), clocks=network_latency) != getattr(output_node.payload, field)): m.d.comb += match.eq(0)
# m.d.comb += identical.eq(0) with m.If(match):
# m.d.comb += appeared[input_node].eq(identical) m.d.comb += appeared.eq(1)
# for i in range(len(self.input)): m.d.comb += Assert(appeared)
# m.d.comb += Assert(appeared[i])
# If the valid bit / channel no. combinations of all input data are # If the valid bit / channel no. combinations of all input data are
# unique then there should be no replacements # unique then there should be no replacements