From 2eb682ee3e4d3fede5e768a21a2c92f63fd7bdaa Mon Sep 17 00:00:00 2001 From: Donald Sebastian Leung Date: Thu, 24 Sep 2020 15:43:33 +0800 Subject: [PATCH] Update README --- README.md | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/README.md b/README.md index f8a36ba..e156f6b 100644 --- a/README.md +++ b/README.md @@ -5,6 +5,19 @@ Formally verified implementation of the ARTIQ RTIO core in nMigen ## Progress - [ ] Implement the core in nMigen +- - [ ] `artiq.gateware.rtio.core` +- - [ ] `misoc.interconnect.csr` +- - [ ] `artiq.gateware.rtio.cri` +- - [ ] `artiq.gateware.rtio.rtlink` +- - [ ] `artiq.gateware.rtio.channel` +- - [ ] `artiq.gateware.rtio.sed.core` +- - [ ] `artiq.gateware.rtio.sed.layouts` +- - [ ] `artiq.gateware.rtio.sed.lane_distributor` +- - [ ] `artiq.gateware.rtio.sed.fifos` +- - [ ] `artiq.gateware.rtio.sed.gates` +- - [ ] `artiq.gateware.rtio.sed.output_driver` +- - [ ] `artiq.gateware.rtio.sed.output_network` +- - [ ] `artiq.gateware.rtio.input_collector` - [ ] Add suitable assertions for verification (BMC / unbounded proof?) ## License