52 lines
1.5 KiB
Python
52 lines
1.5 KiB
Python
from nmigen import *
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from nmigen.asserts import *
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"""
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Causal Check
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"""
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class CausalCheck(Elaboratable):
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def __init__(self):
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# Input ports
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self.reset = Signal(1)
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self.check = Signal(1)
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self.rvfi_valid = Signal(1)
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self.rvfi_rd_addr = Signal(5)
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self.rvfi_order = Signal(64)
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self.rvfi_rs1_addr = Signal(5)
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self.rvfi_rs2_addr = Signal(5)
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def ports(self):
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input_ports = [
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self.reset,
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self.check,
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self.rvfi_valid,
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self.rvfi_rd_addr,
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self.rvfi_order,
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self.rvfi_rs1_addr,
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self.rvfi_rs2_addr
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]
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return input_ports
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def elaborate(self, platform):
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m = Module()
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insn_order = AnyConst(64)
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register_index = AnyConst(5)
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found_non_causal = Signal(1, reset=0)
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with m.If(self.reset):
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m.d.sync += found_non_causal.eq(0)
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with m.Else():
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with m.If(self.check):
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m.d.comb += Assume(register_index != 0)
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m.d.comb += Assume(self.rvfi_valid)
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m.d.comb += Assume(register_index == self.rvfi_rd_addr)
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m.d.comb += Assume(insn_order == self.rvfi_order)
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m.d.comb += Assert(~found_non_causal)
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with m.Else():
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with m.If(self.rvfi_valid & (self.rvfi_order > insn_order) & ((register_index == self.rvfi_rs1_addr) | (register_index == self.rvfi_rs2_addr))):
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m.d.sync += found_non_causal.eq(1)
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return m
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