Add MULW instruction
This commit is contained in:
parent
8fa2a33ecf
commit
1eab79538a
|
@ -0,0 +1,20 @@
|
||||||
|
from .insn_rv64m_r_type import *
|
||||||
|
|
||||||
|
"""
|
||||||
|
MULW instruction
|
||||||
|
"""
|
||||||
|
|
||||||
|
class InsnMulw(InsnRV64MRType):
|
||||||
|
def __init__(self, params):
|
||||||
|
super.__init__(params, 0b000)
|
||||||
|
def elaborate(self, platform):
|
||||||
|
m = super().elaborate(platform)
|
||||||
|
|
||||||
|
result = Signal(32)
|
||||||
|
if self.params.altops:
|
||||||
|
m.d.comb += result.eq((self.rvfi_rs1_rdata + self.rvfi_rs2_rdata) ^ 0x2cdf52a55876063e)
|
||||||
|
else:
|
||||||
|
m.d.comb += result.eq(self.rvfi_rs1_rdata[:32] * self.rvfi_rs2_rdata[:32])
|
||||||
|
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, (Mux(result[31], 2 ** (self.params.xlen - 32) - 1, 0) << 32) | result, 0))
|
||||||
|
|
||||||
|
return m
|
Loading…
Reference in New Issue