From 1eab79538ae3eb8dd808804a1d3ec00f7fd9c073 Mon Sep 17 00:00:00 2001
From: Donald Sebastian Leung <dl@m-labs.hk>
Date: Fri, 28 Aug 2020 11:45:45 +0800
Subject: [PATCH] Add MULW instruction

---
 rvfi/insns/insn_mulw.py | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 rvfi/insns/insn_mulw.py

diff --git a/rvfi/insns/insn_mulw.py b/rvfi/insns/insn_mulw.py
new file mode 100644
index 0000000..cbae272
--- /dev/null
+++ b/rvfi/insns/insn_mulw.py
@@ -0,0 +1,20 @@
+from .insn_rv64m_r_type import *
+
+"""
+MULW instruction
+"""
+
+class InsnMulw(InsnRV64MRType):
+    def __init__(self, params):
+        super.__init__(params, 0b000)
+    def elaborate(self, platform):
+        m = super().elaborate(platform)
+
+        result = Signal(32)
+        if self.params.altops:
+            m.d.comb += result.eq((self.rvfi_rs1_rdata + self.rvfi_rs2_rdata) ^ 0x2cdf52a55876063e)
+        else:
+            m.d.comb += result.eq(self.rvfi_rs1_rdata[:32] * self.rvfi_rs2_rdata[:32])
+        m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, (Mux(result[31], 2 ** (self.params.xlen - 32) - 1, 0) << 32) | result, 0))
+
+        return m