riscv-formal-nmigen/rvfi/insns/insn_sw.py

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2020-08-17 11:50:53 +08:00
from .insn_rv32i_s_type import *
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"""
SW instruction
"""
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class InsnSw(InsnRV32ISType):
def __init__(self, RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_ALIGNED_MEM):
super().__init__(RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_ALIGNED_MEM, 0b010, 4)