riscv-formal-nmigen/rvfi/insns/insn_mulhu.py

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2020-08-26 16:43:21 +08:00
from .insn_rv32m_r_type import *
"""
MULHU instruction
"""
class InsnMulhu(InsnRV32MRType):
def __init__(self, params):
super().__init__(params, 0b011)
def elaborate(self, platform):
m = super().elaborate(platform)
if self.params.altops:
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, (self.rvfi_rs1_rdata + self.rvfi_rs2_rdata) ^ 0xd13db50d949ce5e8, 0))
else:
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, (self.rvfi_rs1_rdata * self.rvfi_rs2_rdata) >> self.params.xlen, 0))
return m