riscv-formal-nmigen/rvfi/insns/insn_divu.py

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2020-08-26 17:03:49 +08:00
from .insn_rv32m_r_type import *
"""
DIVU instruction
"""
class InsnDivu(InsnRV32MRType):
def __init__(self, params):
super().__init__(params, 0b101)
def elaborate(self, platform):
m = super().elaborate(platform)
if self.params.altops:
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, (self.rvfi_rs1_rdata - self.rvfi_rs2_rdata) ^ 0x8c629acb10e8fd70, 0))
else:
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, Mux(self.rvfi_rs2_rdata == 0, 2 ** self.params.xlen - 1, self.rvfi_rs1_rdata // self.rvfi_rs2_rdata), 0))
return m