riscv-formal-nmigen/rvfi/insns/insn_mulh.py

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2020-08-26 16:30:54 +08:00
from .insn_rv32m_r_type import *
2020-08-26 16:39:17 +08:00
"""
MULH instruction
"""
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class InsnMulh(InsnRV32MRType):
def __init__(self, params):
super().__init__(params, 0b001)
def elaborate(self, platform):
m = super().elaborate(platform)
if self.params.altops:
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, (self.rvfi_rs1_rdata + self.rvfi_rs2_rdata) ^ 0x15d01651f6583fb7, 0))
else:
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, (((Mux(self.rvfi_rs1_rdata[-1], 2 ** self.params.xlen - 1, 0) << self.params.xlen) | self.rvfi_rs1_rdata) * ((Mux(self.rvfi_rs1_rdata[-1], 2 ** self.params.xlen - 1, 0) << self.params.xlen) | self.rvfi_rs2_rdata)) >> self.params.xlen, 0))
return m