reduce warning

examples/mqtt_client.rs

@@ -6,33 +6,26 @@ use log::{info, warn};
 use smoltcp as net;
 use stm32h7xx_hal::ethernet;
 use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac};
-use embedded_hal::{
-    blocking::spi::Transfer,
-    digital::v2::OutputPin,
-};
 
-use heapless::{consts, String};
+use heapless::consts;
 
 use cortex_m;
-use cortex_m_rt::{
-    entry,
-    exception,
-};
+use cortex_m_rt::entry;
 use rtic::cyccnt::{Instant, U32Ext};
 
 use minimq::{
-    embedded_nal::{IpAddr, Ipv4Addr, TcpStack, SocketAddr, Mode},
+    embedded_nal::{IpAddr, Ipv4Addr, TcpStack},
     MqttClient, QoS
 };
 
-use firmware::nal_tcp_client::{NetworkStack, NetStorage, NetworkInterface};
+use firmware::nal_tcp_client::{NetworkStack, NetStorage};
 use firmware::{
 	cpld::{
 		CPLD,
     },
 };
 use firmware::Urukul;
-use firmware::mqtt_mux::{MqttCommandType, MqttMux};
+use firmware::mqtt_mux::MqttMux;
 
 #[path = "util/logger.rs"]
 mod logger;
@@ -93,7 +86,7 @@ fn main() -> ! {
         logger::enable_itm(&dp.DBGMCU, &mut cp.DCB, &mut cp.ITM);
     }
     logger::init();
-    let mut delay = cp.SYST.delay(ccdr.clocks);
+    // let mut delay = cp.SYST.delay(ccdr.clocks);
 
     let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
     let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
@@ -173,7 +166,7 @@ fn main() -> ! {
     let cpld = CPLD::new(spi, (cs0, cs1, cs2), io_update);
     let parts = cpld.split();
 
-    let mut urukul = Urukul::new(
+    let urukul = Urukul::new(
         parts.spi1, parts.spi2, parts.spi3, parts.spi4, parts.spi5, parts.spi6, parts.spi7
     );
 

src/bitmask_macro.rs

@@ -42,6 +42,7 @@ macro_rules! construct_bitmask {
 				assert!(arg < (2 << self.get_width()));
 				(arg << (self.get_shift() % ((size_of::<$unsigned_type>() as u8) * 8)))
 			}
+			#[allow(dead_code)]
 			pub(crate) fn set_data_by_arg(self, data: &mut $unsigned_type, arg: $unsigned_type) {
 				// Clear bits in field, then insert shifted argument
 				*data &= (!self.get_bitmask());

src/flash.rs

@@ -1,17 +1,9 @@
 use embedded_hal::{
 	digital::v2::{OutputPin, InputPin},
     blocking::spi::Transfer,
-    blocking::delay::{DelayMs, DelayUs},
+    blocking::delay::DelayUs,
 };
-
-use cortex_m;
-use cortex_m::asm::nop;
-use cortex_m_rt::entry;
-
-use core::ptr;
-use nb::block;
-
-use log::{warn, debug};
+use log::info;
 
 #[derive(Debug)]
 pub enum FPGAFlashError {
@@ -91,10 +83,10 @@ pub fn flash_ice40_fpga<SPI: Transfer<u8>,
         _ => return Err(FPGAFlashError::ResetStatusError),
     };
 
-    debug!("Configuration successful!");
+    info!("Configuration successful!");
     // Send at least another 49 clock cycles to activate IO pins (choosing same 13 bytes)
     spi.transfer(&mut dummy_13_bytes).map_err(|_| FPGAFlashError::SPICommunicationError)?;
-    debug!("User I/O pins activated.");
+    info!("User I/O pins activated.");
     Ok(())
 
 }

src/spi_slave.rs

@@ -2,8 +2,6 @@ use embedded_hal::{
 	blocking::spi::Transfer,
 	digital::v2::OutputPin,
 };
-use core::marker::PhantomData;
-
 use crate::cpld::CPLD;
 use crate::Error;