2020-08-11 16:51:17 +08:00
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use embedded_hal::blocking::spi::Transfer;
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use crate::Error;
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2020-08-26 11:04:08 +08:00
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use core::mem::size_of;
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2020-08-11 11:29:47 +08:00
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2020-08-12 12:28:33 +08:00
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// Bitmasks for CFG
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2020-08-13 16:31:27 +08:00
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construct_bitmask!(CFGMask; u32;
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2020-08-12 12:28:33 +08:00
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RF_SW, 0, 4,
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2020-08-11 16:51:17 +08:00
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LED, 4, 4,
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PROFILE, 8, 3,
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IO_UPDATE, 12, 1,
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MASK_NU, 13, 4,
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CLK_SEL0, 17, 1,
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SYNC_SEL, 18, 1,
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RST, 19, 1,
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IO_RST, 20, 1,
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CLK_SEL1, 21, 1,
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2020-08-12 12:28:33 +08:00
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DIV, 22, 2
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);
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// BitMasks for CFG read
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2020-08-13 16:31:27 +08:00
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construct_bitmask!(StatusMask; u32;
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2020-08-12 12:28:33 +08:00
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RF_SW, 0, 4,
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2020-08-11 16:55:31 +08:00
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SMP_ERR, 4, 4,
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PLL_LOCK, 8, 4,
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IFC_MODE, 12, 4,
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PROTO_KEY, 16, 7
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2020-08-11 16:51:17 +08:00
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);
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2020-08-11 11:29:47 +08:00
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pub struct ConfigRegister<SPI> {
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spi: SPI,
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data: u32,
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}
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2020-08-11 16:51:17 +08:00
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impl<SPI, E> ConfigRegister<SPI>
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where
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SPI: Transfer<u8, Error = E>
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{
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pub fn new(spi: SPI) -> Self {
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ConfigRegister {
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spi,
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data: 0,
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}
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}
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2020-08-12 12:26:15 +08:00
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/*
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* Set configuration bits according to data field
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* Return status
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*/
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2020-08-12 11:50:24 +08:00
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fn set_all_configurations(&mut self) -> Result<u32, Error<E>> {
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2020-08-11 16:51:17 +08:00
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match self.spi.transfer(&mut [
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2020-08-12 11:50:24 +08:00
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((self.data & 0x00FF0000) >> 16) as u8,
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((self.data & 0x0000FF00) >> 8) as u8,
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((self.data & 0x000000FF) >> 0) as u8,
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2020-08-11 16:51:17 +08:00
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]).map_err(Error::SPI) {
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2020-08-12 12:26:15 +08:00
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Ok(arr) => Ok(
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((arr[0] as u32) << 16) |
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((arr[1] as u32) << 8) |
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arr[2] as u32
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),
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2020-08-11 16:51:17 +08:00
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Err(e) => Err(e),
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}
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}
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2020-08-12 11:50:24 +08:00
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2020-08-12 12:26:15 +08:00
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/*
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* Set configuration bits according to supplied configs
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* Return status
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*/
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2020-08-12 11:50:24 +08:00
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pub fn set_configurations(&mut self, configs: &mut[(CFGMask, u32)]) -> Result<u32, Error<E>> {
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for config in configs.into_iter() {
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2020-08-13 16:31:27 +08:00
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config.0.set_data_by_arg(&mut self.data, config.1)
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2020-08-12 11:50:24 +08:00
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}
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// Write all configurations at the same time
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self.set_all_configurations()
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}
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2020-08-12 12:00:11 +08:00
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2020-08-12 12:26:15 +08:00
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/*
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* Return selected configuration field
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2020-09-15 14:03:59 +08:00
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* TODO: Return result type instead for error checking
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2020-08-12 12:26:15 +08:00
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*/
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2020-08-12 12:00:11 +08:00
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pub fn get_configuration(&mut self, config_type: CFGMask) -> u8 {
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2020-08-26 16:49:37 +08:00
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config_type.get_filtered_content(self.data) as u8
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2020-08-12 12:00:11 +08:00
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}
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2020-08-12 12:26:15 +08:00
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/*
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2020-08-26 11:04:08 +08:00
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* Return status using mask
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2020-08-12 12:26:15 +08:00
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*/
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2020-08-12 12:28:33 +08:00
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pub fn get_status(&mut self, status_type: StatusMask) -> Result<u8, Error<E>> {
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2020-08-12 12:26:15 +08:00
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match self.set_all_configurations() {
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2020-08-13 17:17:21 +08:00
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Ok(val) => Ok(status_type.get_filtered_content(val) as u8),
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2020-08-12 12:26:15 +08:00
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Err(e) => Err(e),
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}
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}
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2020-08-26 11:04:08 +08:00
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/*
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* Return entire status register
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*/
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pub fn get_all_status(&mut self) -> Result<u32, Error<E>> {
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return self.set_all_configurations();
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}
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2020-08-31 17:43:15 +08:00
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/*
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* Test method for Configuration Register.
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* Return the number of test failed.
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*/
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pub fn test(&mut self) -> Result<u32, Error<E>> {
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// Test configuration register by getting PROTO_KEY.
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match self.get_status(StatusMask::PROTO_KEY) {
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Ok(8) => Ok(0),
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Ok(_) => Ok(1),
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Err(_) => Err(Error::ConfigRegisterError),
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}
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}
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2020-08-11 16:51:17 +08:00
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}
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impl<SPI, E> Transfer<u8> for ConfigRegister<SPI>
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where
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SPI: Transfer<u8, Error = E>
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{
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type Error = Error<E>;
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fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
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self.spi.transfer(words).map_err(Error::SPI)
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}
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}
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