cfg_reg: add status getter

pull/4/head
occheung 2020-08-12 12:26:15 +08:00
parent 8f4a97c97e
commit ccd6a1faf9
4 changed files with 29 additions and 4 deletions

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@ -1,5 +1,5 @@
[target.thumbv7em-none-eabihf]
runner = "gdb -q -x gdb_config/debug.gdb"
runner = "gdb -q -x gdb_config/fpga_config.gdb"
rustflags = [
"-C", "link-arg=-Tlink.x",
]

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@ -29,7 +29,7 @@ class UrukulConnector(Module):
]
# Debug purposes: Tie EEM MISO to EEM MOSI
self.comb += eem.p[2].eq(eem.n[1])
self.comb += eem.p[2].eq(eem.p[1])
if __name__ == "__main__":

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@ -82,17 +82,29 @@ where
}
}
/*
* Set configuration bits according to data field
* Return status
*/
fn set_all_configurations(&mut self) -> Result<u32, Error<E>> {
match self.spi.transfer(&mut [
((self.data & 0x00FF0000) >> 16) as u8,
((self.data & 0x0000FF00) >> 8) as u8,
((self.data & 0x000000FF) >> 0) as u8,
]).map_err(Error::SPI) {
Ok(arr) => Ok(self.data),
Ok(arr) => Ok(
((arr[0] as u32) << 16) |
((arr[1] as u32) << 8) |
arr[2] as u32
),
Err(e) => Err(e),
}
}
/*
* Set configuration bits according to supplied configs
* Return status
*/
pub fn set_configurations(&mut self, configs: &mut[(CFGMask, u32)]) -> Result<u32, Error<E>> {
for config in configs.into_iter() {
// Erase the bits in the configuration region
@ -107,9 +119,22 @@ where
self.set_all_configurations()
}
/*
* Return selected configuration field
*/
pub fn get_configuration(&mut self, config_type: CFGMask) -> u8 {
((self.data & config_type.get_bitmask()) >> config_type.get_shift()) as u8
}
/*
* Return status
*/
pub fn get_status(&mut self, status_type: CFGMask) -> Result<u8, Error<E>> {
match self.set_all_configurations() {
Ok(val) => Ok(((val & status_type.get_bitmask()) >> status_type.get_shift()) as u8),
Err(e) => Err(e),
}
}
}
impl<SPI, E> Transfer<u8> for ConfigRegister<SPI>

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@ -96,7 +96,7 @@ fn main() -> ! {
let mut config = ConfigRegister::new(parts.spi1);
// Target configuration: 0x000FF1CE
hprintln!("{}", config.set_configurations(&mut [
hprintln!("{:#06X}", config.set_configurations(&mut [
(CFGMask::RF_SW, 0xE),
(CFGMask::LED, 0xC),
(CFGMask::PROFILE, 0x1),