Robert Jordens f8e6b4f4e3 ad5360: port to spi2 ... * kc705 nist_clock target gateware * coredevice driver * moninj code * test/example/device_db This is untested as we don't have a AD5360 board right now. Will be tested with Zotino v1.1 m-labs/artiq#926		2018-02-22 10:25:46 +01:00
..
__init__.py	rtio: refactor, use rtlink	2015-04-14 19:44:45 +08:00
ad5360_monitor.py	ad5360: port to spi2	2018-02-22 10:25:46 +01:00
dds.py	ad9xxx -> ad9_dds	2017-01-04 11:34:52 +01:00
sawg.py	sawg: don't enable_replace for Config	2017-06-28 20:31:40 +02:00
spi2.py	spi2: add RTIO gateware and coredevice driver	2018-02-21 13:37:36 +00:00
spi.py	gateware: add support for SPI-over-LVDS	2017-10-23 15:04:01 +08:00
ttl_serdes_7series.py	ttl_serdes_7series: drive IBUF and INTERM disables from serdes	2018-02-21 13:37:29 +00:00
ttl_serdes_generic.py	rtio: Inout → InOut	2017-03-14 14:18:55 +08:00
ttl_simple.py	rtio: Inout → InOut	2017-03-14 14:18:55 +08:00
wishbone.py	rtio: remove NOP suppression capability	2016-03-10 09:47:29 +08:00