artiq/artiq/gateware/targets
Sebastien Bourdeauducq d2f2415b50 analyzer: use CRI and connect at RTIO core
This causes DMA events to be included in analyzer traces.
2017-03-02 18:47:56 +08:00
..
__init__.py package everything to rebuild core device binaries 2015-11-09 10:47:14 +08:00
kc705_dds.py analyzer: use CRI and connect at RTIO core 2017-03-02 18:47:56 +08:00
kc705_drtio_master.py gateware: remove unused configs in targets (not needed with new moninj) 2017-02-25 12:14:56 +08:00
kc705_drtio_satellite.py gateware: add moninj to drtio targets 2017-02-21 21:54:47 +08:00
phaser.py analyzer: use CRI and connect at RTIO core 2017-03-02 18:47:56 +08:00
pipistrello.py analyzer: use CRI and connect at RTIO core 2017-03-02 18:47:56 +08:00