artiq/artiq/gateware/rtio
Sebastien Bourdeauducq 9142a5ab8a rtio: expose coarse timestamp in RTIO and DRTIO satellite cores 2018-06-20 17:39:54 +08:00
..
phy rtio: add grabber deserializer and WIP PHY encapsulation 2018-05-28 22:42:27 +08:00
sed rtio/sed: fix output network cmp_wrap 2018-05-02 12:04:03 +08:00
__init__.py rtio: use SED 2017-09-16 14:13:42 +08:00
analyzer.py rtio: make sequence errors consistently asychronous 2017-09-29 14:40:06 +08:00
cdc.py rtio: judicious spray with reset_less=True 2018-03-07 14:57:18 +00:00
channel.py rtio: use SED 2017-09-16 14:13:42 +08:00
core.py rtio: expose coarse timestamp in RTIO and DRTIO satellite cores 2018-06-20 17:39:54 +08:00
cri.py rtio: move CRI write comment to more appropriate location 2018-03-29 23:55:00 +08:00
dma.py drtio: raise RTIOLinkError if operation fails due to link lost (#942) 2018-03-04 01:02:53 +08:00
input_collector.py rtio: judicious spray with reset_less=True 2018-03-07 14:57:18 +00:00
moninj.py moninj: do not require a rsys clock domain 2017-02-20 15:52:48 +08:00
rtlink.py rtio: judicious spray with reset_less=True 2018-03-07 14:57:18 +00:00