artiq/artiq/gateware
Sebastien Bourdeauducq 88ad054ab6 Merge branch 'drtio' 2016-12-03 23:25:17 +08:00
..
amp gateware: rewrite mailbox to use bits_for. 2016-11-01 06:28:43 +00:00
drtio drtio: add false paths between sys and transceiver clocks 2016-12-03 23:03:01 +08:00
rtio Merge branch 'drtio' 2016-12-03 23:25:17 +08:00
targets drtio: add false paths between sys and transceiver clocks 2016-12-03 23:03:01 +08:00
__init__.py artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
ad9xxx.py Remove last vestiges of nist_qc1. 2016-11-21 15:36:22 +00:00
nist_clock.py gateware/nist_clock: increase DDS bus drive strength. Closes #468 2016-06-07 11:08:19 -04:00
nist_qc2.py qc2: swap SPI/TTL, all TTL lines are now In+Out compatible 2016-05-19 10:42:03 +08:00
soc.py Merge branch 'master' into drtio 2016-11-06 00:13:32 +08:00
spi.py gateware/spi: fix import 2016-10-17 14:47:19 +08:00