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mirror of https://github.com/m-labs/artiq.git synced 2024-12-12 05:06:36 +08:00
artiq/artiq/gateware
2017-01-02 22:15:21 +01:00
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amp gateware: rewrite mailbox to use bits_for. 2016-11-01 06:28:43 +00:00
drtio drtio: fix aux controller clock domain mistakes 2016-12-14 10:16:45 +08:00
dsp fir: streamline, optimize DSP extraction, left-align inputs 2016-12-20 21:39:51 +01:00
rtio rtio: use same reset for counter_rtio whatever the interface delay is 2016-12-15 09:28:13 +08:00
targets phaser: add note about DDS defines (#650) 2017-01-02 22:15:21 +01:00
__init__.py artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
ad9xxx.py Remove last vestiges of nist_qc1. 2016-11-21 15:36:22 +00:00
ad9154_fmc_ebz.py Merge remote-tracking branch 'm-labs/phaser2' into phaser2 2016-12-02 14:11:56 +01:00
nist_clock.py gateware/nist_clock: increase DDS bus drive strength. Closes #468 2016-06-07 11:08:19 -04:00
nist_qc2.py qc2: swap SPI/TTL, all TTL lines are now In+Out compatible 2016-05-19 10:42:03 +08:00
soc.py Merge branch 'master' into drtio 2016-11-06 00:13:32 +08:00
spi.py gateware/spi: fix import 2016-10-17 14:47:19 +08:00