2
0
mirror of https://github.com/m-labs/artiq.git synced 2024-12-12 05:06:36 +08:00
artiq/artiq/gateware
Robert Jordens 1c84d1ee59 Merge branch 'master' into phaser2
* master:
  rtio: support differential ttl
  RELEASE_NOTES: int(a, width=b) removal, use int32/64
  pc_rpc: use ProactorEventLoop on Windows (#627)
2016-11-24 15:05:49 +01:00
..
amp gateware: rewrite mailbox to use bits_for. 2016-11-01 06:28:43 +00:00
dsp sawg: fix b delay width 2016-11-20 16:39:22 +01:00
rtio Merge branch 'master' into phaser2 2016-11-24 15:05:49 +01:00
targets Merge remote-tracking branch 'm-labs/master' into phaser2 2016-11-23 14:56:29 +01:00
__init__.py artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
ad9xxx.py Remove last vestiges of nist_qc1. 2016-11-21 15:36:22 +00:00
nist_clock.py gateware/nist_clock: increase DDS bus drive strength. Closes #468 2016-06-07 11:08:19 -04:00
nist_qc2.py qc2: swap SPI/TTL, all TTL lines are now In+Out compatible 2016-05-19 10:42:03 +08:00
phaser.py phaser: spi, sma_gpio: 2.5 V 2016-10-27 15:53:49 +02:00
soc.py gateware: extend mailbox to 3 entries. 2016-10-21 12:09:14 +00:00
spi.py gateware/spi: fix import 2016-10-17 14:07:11 +08:00