Merge remote-tracking branch 'm-labs/master' into phaser2

* m-labs/master:
  runtime: don't attempt to perform writeback if disabled in kernel.
  runtime: print trace level log messages to UART during startup.
  runtime: support for targets without RTIO log channel
  runtime: support for targets without I2C
  kc705: remove stale DDS definition
  runtime: show a prompt to erase startup/idle kernels.

artiq/gateware/targets/kc705.py

@@ -236,12 +236,11 @@ class NIST_CLOCK(_NIST_Ions):
                                                    ofifo_depth=512,
                                                    ififo_depth=4))
 
+        self.config["HAS_RTIO_LOG"] = None
         self.config["RTIO_LOG_CHANNEL"] = len(rtio_channels)
         rtio_channels.append(rtio.LogChannel())
 
         self.add_rtio(rtio_channels)
-        assert self.rtio.fine_ts_width <= 3
-        self.config["DDS_RTIO_CLK_RATIO"] = 24 >> self.rtio.fine_ts_width
 
 
 class NIST_QC2(_NIST_Ions):
@@ -316,12 +315,11 @@ class NIST_QC2(_NIST_Ions):
                                                        ofifo_depth=512,
                                                        ififo_depth=4))
 
+        self.config["HAS_RTIO_LOG"] = None
         self.config["RTIO_LOG_CHANNEL"] = len(rtio_channels)
         rtio_channels.append(rtio.LogChannel())
 
         self.add_rtio(rtio_channels)
-        assert self.rtio.fine_ts_width <= 3
-        self.config["DDS_RTIO_CLK_RATIO"] = 24 >> self.rtio.fine_ts_width
 
 
 class _PhaserCRG(Module, AutoCSR):

artiq/gateware/targets/pipistrello.py

@@ -212,6 +212,7 @@ trce -v 12 -fastpaths -tsi {build_name}.tsi -o {build_name}.twr {build_name}.ncd
         rtio_channels.append(rtio.Channel.from_phy(
             phy, ofifo_depth=64, ififo_depth=64))
 
+        self.config["HAS_RTIO_LOG"] = None
         self.config["RTIO_LOG_CHANNEL"] = len(rtio_channels)
         rtio_channels.append(rtio.LogChannel())
 

artiq/runtime.rs/libksupport/api.rs

@@ -106,10 +106,15 @@ static mut API: &'static [(&'static str, *const ())] = &[
     api!(rtio_input_timestamp = ::rtio::input_timestamp),
     api!(rtio_input_data = ::rtio::input_data),
 
+    #[cfg(has_i2c)]
     api!(i2c_init = ::i2c::init),
+    #[cfg(has_i2c)]
     api!(i2c_start = ::i2c::start),
+    #[cfg(has_i2c)]
     api!(i2c_stop = ::i2c::stop),
+    #[cfg(has_i2c)]
     api!(i2c_write = ::i2c::write),
+    #[cfg(has_i2c)]
     api!(i2c_read = ::i2c::read),
 
 // #if (defined CONFIG_AD9154_CS)

artiq/runtime.rs/libksupport/lib.rs

@@ -50,6 +50,7 @@ macro_rules! artiq_raise {
 }
 
 mod rtio;
+#[cfg(has_i2c)]
 mod i2c;
 
 use core::{mem, ptr, slice, str};
@@ -306,7 +307,10 @@ pub unsafe fn main() {
     (mem::transmute::<usize, fn()>(library.lookup("__modinit__")))();
     send(&NowSave(NOW));
 
-    attribute_writeback(library.lookup("typeinfo") as *const ());
+    let typeinfo = library.lookup("typeinfo");
+    if typeinfo != 0 {
+        attribute_writeback(typeinfo as *const ())
+    }
 
     send(&RunFinished);
 

artiq/runtime.rs/libksupport/rtio.rs

@@ -160,6 +160,7 @@ pub extern fn input_data(channel: u32) -> u32 {
     }
 }
 
+#[cfg(has_rtio_log)]
 pub fn log(timestamp: i64, data: &[u8]) {
     unsafe {
         csr::rtio::chan_sel_write(csr::CONFIG_RTIO_LOG_CHANNEL);
@@ -181,3 +182,6 @@ pub fn log(timestamp: i64, data: &[u8]) {
         csr::rtio::o_we_write(1);
     }
 }
+
+#[cfg(not(has_rtio_log))]
+pub fn log(timestamp: i64, data: &[u8]) {}

artiq/runtime.rs/src/lib.rs

@@ -18,6 +18,7 @@ use logger::BufferLogger;
 extern {
     fn putchar(c: libc::c_int) -> libc::c_int;
     fn readchar() -> libc::c_char;
+    fn readchar_nonblock() -> libc::c_int;
 }
 
 #[macro_export]
@@ -100,11 +101,23 @@ pub unsafe extern fn rust_main() {
     static mut LOG_BUFFER: [u8; 65536] = [0; 65536];
     BufferLogger::new(&mut LOG_BUFFER[..])
                  .register(move || {
-        info!("booting ARTIQ...");
+        clock::init();
+        info!("booting ARTIQ");
         info!("software version {}", GIT_COMMIT);
         info!("gateware version {}", ::board::ident(&mut [0; 64]));
 
-        clock::init();
+        let t = clock::get_ms();
+        info!("press 'e' to erase startup and idle kernels...");
+        while clock::get_ms() < t + 1000 {
+            if readchar_nonblock() != 0 && readchar() == b'e' as libc::c_char {
+                config::remove("startup_kernel");
+                config::remove("idle_kernel");
+                info!("startup and idle kernels erased");
+                break
+            }
+        }
+        info!("continuing boot");
+
         rtio_crg::init();
         network_init();
 

artiq/runtime.rs/src/logger.rs

@@ -1,11 +1,12 @@
 use core::{mem, ptr};
-use core::cell::RefCell;
+use core::cell::{Cell, RefCell};
 use log::{self, Log, LogLevel, LogMetadata, LogRecord, LogLevelFilter};
 use log_buffer::LogBuffer;
 use clock;
 
 pub struct BufferLogger {
-    buffer: RefCell<LogBuffer<&'static mut [u8]>>
+    buffer: RefCell<LogBuffer<&'static mut [u8]>>,
+    trace_to_uart: Cell<bool>
 }
 
 unsafe impl Sync for BufferLogger {}
@@ -15,7 +16,8 @@ static mut LOGGER: *const BufferLogger = ptr::null();
 impl BufferLogger {
     pub fn new(buffer: &'static mut [u8]) -> BufferLogger {
         BufferLogger {
-            buffer: RefCell::new(LogBuffer::new(buffer))
+            buffer: RefCell::new(LogBuffer::new(buffer)),
+            trace_to_uart: Cell::new(true)
         }
     }
 
@@ -48,6 +50,14 @@ impl BufferLogger {
     pub fn extract<R, F: FnOnce(&str) -> R>(&self, f: F) -> R {
         f(self.buffer.borrow_mut().extract())
     }
+
+    pub fn disable_trace_to_uart(&self) {
+        if self.trace_to_uart.get() {
+            trace!("disabling tracing to UART; all further trace messages \
+                    are sent to core log only");
+            self.trace_to_uart.set(false)
+        }
+    }
 }
 
 impl Log for BufferLogger {
@@ -61,7 +71,10 @@ impl Log for BufferLogger {
             writeln!(self.buffer.borrow_mut(),
                      "[{:12}us] {:>5}({}): {}",
                      clock::get_us(), record.level(), record.target(), record.args()).unwrap();
-            if record.level() <= LogLevel::Info {
+
+            // Printing to UART is really slow, so avoid doing that when we have an alternative
+            // route to retrieve the debug messages.
+            if self.trace_to_uart.get() || record.level() <= LogLevel::Info {
                 println!("[{:12}us] {:>5}({}): {}",
                          clock::get_us(), record.level(), record.target(), record.args());
             }

artiq/runtime.rs/src/session.rs

@@ -583,6 +583,8 @@ pub fn thread(waiter: Waiter, spawner: Spawner) {
         }
     }
 
+    BufferLogger::with_instance(|logger| logger.disable_trace_to_uart());
+
     let addr = SocketAddr::new(IP_ANY, 1381);
     let listener = TcpListener::bind(waiter, addr).expect("cannot bind socket");
     listener.set_keepalive(true);