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artiq/artiq/compiler
2015-11-23 23:59:59 +08:00
..
algorithms compiler.ir: change argument order for BasicBlock.insert. 2015-11-23 23:59:25 +08:00
analyses compiler.analyses.domination: fix PostDominatorTree. 2015-11-09 12:49:27 +03:00
testbench Merge branch 'master' into new-py2llvm 2015-10-13 19:24:45 +03:00
transforms transforms.interleaver: fix IR type/value mismatch. 2015-11-23 18:53:42 +08:00
validators compiler.analyses.domination: implement new dominator tree algorithm. 2015-11-09 11:51:54 +03:00
__init__.py Add basic support for embedded functions with new compiler. 2015-08-07 11:44:49 +03:00
asttyped.py compiler: add delay IR instruction. 2015-11-17 05:16:43 +03:00
builtins.py compiler: maintain both the IR and iodelay forms of delay expressions. 2015-11-21 03:22:47 +08:00
embedding.py compiler: add delay IR instruction. 2015-11-17 05:16:43 +03:00
iodelay.py compiler.iodelay: always fully fold SToMU and MUToS. 2015-11-23 23:59:59 +08:00
ir.py compiler.ir: change argument order for BasicBlock.insert. 2015-11-23 23:59:25 +08:00
module.py transforms.interleaver: add boilerplate. 2015-11-17 05:22:20 +03:00
prelude.py compiler.{iodelay,transforms.iodelay_estimator}: implement. 2015-09-02 17:55:48 -06:00
targets.py compiler: make IR dumps vastly more readable. 2015-11-17 00:23:34 +03:00
types.py compiler.types: dump type variable iodelay explicitly. 2015-11-17 00:51:56 +03:00