mirror of https://github.com/m-labs/artiq.git
compiler: maintain both the IR and iodelay forms of delay expressions.
After this commit, the delay instruction (again) does not generate
any LLVM IR: all heavy lifting is relegated to the delay and delay_mu
intrinsics. When the interleave transform needs to adjust the global
timeline, it synthesizes a delay_mu intrinsnic. This way,
the interleave transformation becomes composable, as the input and
the output IR invariants are the same.
Also, code generation is adjusted so that a basic block is split off
not only after a delay call, but also before one; otherwise, e.g.,
code immediately at the beginning of a `with parallel:` branch
would have no choice but to execute after another branch has already
advanced the timeline.
This takes care of issue #1 described in 50e7b44 and is a step
to solving issue #2.
This commit is contained in:
whitequark
parent
50e7b44d04
commit
cb3b811fd7
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@ -38,6 +38,12 @@ class TInt(types.TMono):
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def one():
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return 1
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def TInt32():
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return TInt(types.TValue(32))
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def TInt64():
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return TInt(types.TValue(64))
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class TFloat(types.TMono):
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def __init__(self):
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super().__init__("float")
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@ -72,6 +72,16 @@ class Constant(Value):
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return "{} {}".format(type_printer.name(self.type),
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repr(self.value))
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def __hash__(self):
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return hash(self.value)
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def __eq__(self, other):
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return isinstance(other, Constant) and \
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other.type == self.type and other.value == self.value
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def __ne__(self, other):
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return not (self == other)
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class NamedValue(Value):
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"""
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An SSA value that has a name.
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@ -190,7 +200,7 @@ class Instruction(User):
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return ", ".join([operand.as_operand(type_printer) for operand in self.operands])
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def as_entity(self, type_printer):
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if builtins.is_none(self.type):
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if builtins.is_none(self.type) and len(self.uses) == 0:
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prefix = ""
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else:
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prefix = "%{} = {} ".format(escape_name(self.name),
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@ -1198,35 +1208,46 @@ class Delay(Terminator):
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:ivar expr: (:class:`iodelay.Expr`) expression
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:ivar var_names: (list of string)
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iodelay expression names corresponding to operands
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iodelay variable names corresponding to operands
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"""
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"""
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:param expr: (:class:`iodelay.Expr`) expression
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:param substs: (dict of str to :class:`Value`)
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SSA values corresponding to iodelay variable names
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:param call: (:class:`Call` or ``Constant(None, builtins.TNone())``)
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the call instruction that caused this delay, if any
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:param target: (:class:`BasicBlock`) branch target
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"""
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def __init__(self, expr, substs, target, name=""):
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def __init__(self, expr, substs, decomposition, target, name=""):
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for var_name in substs: assert isinstance(var_name, str)
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assert isinstance(decomposition, Call) or \
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isinstance(decomposition, Builtin) and decomposition.op in ("delay", "delay_mu")
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assert isinstance(target, BasicBlock)
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super().__init__([target, *substs.values()], builtins.TNone(), name)
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super().__init__([decomposition, target, *substs.values()], builtins.TNone(), name)
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self.expr = expr
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self.var_names = list(substs.keys())
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def target(self):
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def decomposition(self):
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return self.operands[0]
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def target(self):
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return self.operands[1]
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def set_target(self, new_target):
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self.operands[0] = new_target
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self.operands[1] = new_target
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def substs(self):
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return zip(self.var_names, self.operands[1:])
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return zip(self.var_names, self.operands[2:])
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def _operands_as_string(self, type_printer):
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substs = []
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for var_name, operand in self.substs():
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substs.append("{}={}".format(var_name, operand))
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return "[{}], {}".format(", ".join(substs), self.target().as_operand(type_printer))
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result = "[{}]".format(", ".join(substs))
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result += ", decomp {}, to {}".format(self.decomposition().as_operand(type_printer),
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self.target().as_operand(type_printer))
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return result
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def opcode(self):
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return "delay({})".format(self.expr)
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@ -1418,15 +1418,6 @@ class ARTIQIRGenerator(algorithm.Visitor):
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return self.append(ir.Alloc(attributes, typ))
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def _make_delay(self, delay):
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if not iodelay.is_const(delay, 0):
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after_delay = self.add_block()
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self.append(ir.Delay(delay,
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{var_name: self.current_args[var_name]
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for var_name in delay.free_vars()},
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after_delay))
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self.current_block = after_delay
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def visit_builtin_call(self, node):
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# A builtin by any other name... Ignore node.func, just use the type.
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typ = node.func.type
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@ -1529,7 +1520,7 @@ class ARTIQIRGenerator(algorithm.Visitor):
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return self.append(ir.Arith(ast.Mult(loc=None), now_mu_float, self.ref_period))
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else:
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assert False
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elif types.is_builtin(typ, "at"):
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elif types.is_builtin(typ, "delay") or types.is_builtin(typ, "at"):
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if len(node.args) == 1 and len(node.keywords) == 0:
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arg = self.visit(node.args[0])
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arg_mu_float = self.append(ir.Arith(ast.Div(loc=None), arg, self.ref_period))
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@ -1537,7 +1528,8 @@ class ARTIQIRGenerator(algorithm.Visitor):
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self.append(ir.Builtin(typ.name + "_mu", [arg_mu], builtins.TNone()))
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else:
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assert False
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elif types.is_builtin(typ, "now_mu") or types.is_builtin(typ, "at_mu"):
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elif types.is_builtin(typ, "now_mu") or types.is_builtin(typ, "delay_mu") \
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or types.is_builtin(typ, "at_mu"):
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return self.append(ir.Builtin(typ.name,
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[self.visit(arg) for arg in node.args], node.type))
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elif types.is_builtin(typ, "mu_to_seconds"):
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@ -1554,9 +1546,6 @@ class ARTIQIRGenerator(algorithm.Visitor):
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return self.append(ir.Coerce(arg_mu, builtins.TInt(types.TValue(64))))
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else:
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assert False
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elif types.is_builtin(typ, "delay") or types.is_builtin(typ, "delay_mu"):
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assert node.iodelay is not None
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self._make_delay(node.iodelay)
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elif types.is_exn_constructor(typ):
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return self.alloc_exn(node.type, *[self.visit(arg_node) for arg_node in node.args])
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elif types.is_constructor(typ):
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@ -1567,77 +1556,82 @@ class ARTIQIRGenerator(algorithm.Visitor):
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def visit_CallT(self, node):
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typ = node.func.type.find()
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if node.iodelay is not None and not iodelay.is_const(node.iodelay, 0):
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before_delay = self.current_block
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during_delay = self.add_block()
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before_delay.append(ir.Branch(during_delay))
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self.current_block = during_delay
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if types.is_builtin(typ):
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return self.visit_builtin_call(node)
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if types.is_function(typ):
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func = self.visit(node.func)
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self_arg = None
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fn_typ = typ
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offset = 0
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elif types.is_method(typ):
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method = self.visit(node.func)
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func = self.append(ir.GetAttr(method, "__func__"))
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self_arg = self.append(ir.GetAttr(method, "__self__"))
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fn_typ = types.get_method_function(typ)
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offset = 1
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insn = self.visit_builtin_call(node)
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else:
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assert False
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args = [None] * (len(fn_typ.args) + len(fn_typ.optargs))
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for index, arg_node in enumerate(node.args):
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arg = self.visit(arg_node)
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if index < len(fn_typ.args):
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args[index + offset] = arg
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if types.is_function(typ):
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func = self.visit(node.func)
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self_arg = None
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fn_typ = typ
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offset = 0
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elif types.is_method(typ):
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method = self.visit(node.func)
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func = self.append(ir.GetAttr(method, "__func__"))
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self_arg = self.append(ir.GetAttr(method, "__self__"))
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fn_typ = types.get_method_function(typ)
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offset = 1
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else:
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args[index + offset] = self.append(ir.Alloc([arg], ir.TOption(arg.type)))
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assert False
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for keyword in node.keywords:
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arg = self.visit(keyword.value)
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if keyword.arg in fn_typ.args:
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for index, arg_name in enumerate(fn_typ.args):
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if keyword.arg == arg_name:
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assert args[index] is None
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args[index] = arg
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break
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elif keyword.arg in fn_typ.optargs:
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for index, optarg_name in enumerate(fn_typ.optargs):
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if keyword.arg == optarg_name:
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assert args[len(fn_typ.args) + index] is None
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args[len(fn_typ.args) + index] = \
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self.append(ir.Alloc([arg], ir.TOption(arg.type)))
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break
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args = [None] * (len(fn_typ.args) + len(fn_typ.optargs))
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for index, optarg_name in enumerate(fn_typ.optargs):
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if args[len(fn_typ.args) + index] is None:
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args[len(fn_typ.args) + index] = \
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self.append(ir.Alloc([], ir.TOption(fn_typ.optargs[optarg_name])))
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for index, arg_node in enumerate(node.args):
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arg = self.visit(arg_node)
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if index < len(fn_typ.args):
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args[index + offset] = arg
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else:
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args[index + offset] = self.append(ir.Alloc([arg], ir.TOption(arg.type)))
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if self_arg is not None:
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assert args[0] is None
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args[0] = self_arg
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for keyword in node.keywords:
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arg = self.visit(keyword.value)
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if keyword.arg in fn_typ.args:
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for index, arg_name in enumerate(fn_typ.args):
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if keyword.arg == arg_name:
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assert args[index] is None
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args[index] = arg
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break
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elif keyword.arg in fn_typ.optargs:
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for index, optarg_name in enumerate(fn_typ.optargs):
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if keyword.arg == optarg_name:
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assert args[len(fn_typ.args) + index] is None
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args[len(fn_typ.args) + index] = \
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self.append(ir.Alloc([arg], ir.TOption(arg.type)))
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break
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assert None not in args
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for index, optarg_name in enumerate(fn_typ.optargs):
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if args[len(fn_typ.args) + index] is None:
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args[len(fn_typ.args) + index] = \
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self.append(ir.Alloc([], ir.TOption(fn_typ.optargs[optarg_name])))
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if self.unwind_target is None:
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insn = self.append(ir.Call(func, args))
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else:
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after_invoke = self.add_block()
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insn = self.append(ir.Invoke(func, args, after_invoke, self.unwind_target))
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self.current_block = after_invoke
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if self_arg is not None:
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assert args[0] is None
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args[0] = self_arg
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method_key = None
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if isinstance(node.func, asttyped.AttributeT):
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attr_node = node.func
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self.method_map[(attr_node.value.type, attr_node.attr)].append(insn)
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assert None not in args
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if self.unwind_target is None:
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insn = self.append(ir.Call(func, args))
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else:
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after_invoke = self.add_block()
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insn = self.append(ir.Invoke(func, args, after_invoke, self.unwind_target))
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self.current_block = after_invoke
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method_key = None
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if isinstance(node.func, asttyped.AttributeT):
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attr_node = node.func
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self.method_map[(attr_node.value.type, attr_node.attr)].append(insn)
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if node.iodelay is not None and not iodelay.is_const(node.iodelay, 0):
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after_delay = self.add_block()
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self.append(ir.Delay(node.iodelay,
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{var_name: self.current_args[var_name]
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for var_name in node.iodelay.free_vars()},
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after_delay))
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substs = {var_name: self.current_args[var_name]
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for var_name in node.iodelay.free_vars()}
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self.append(ir.Delay(node.iodelay, substs, insn, after_delay))
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self.current_block = after_delay
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return insn
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@ -3,7 +3,7 @@
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the timestamp would always monotonically nondecrease.
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"""
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from .. import ir, iodelay
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from .. import types, builtins, ir, iodelay
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from ..analyses import domination
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def delay_free_subgraph(root, limit):
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@ -81,20 +81,39 @@ class Interleaver:
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target_time_delta = new_target_time - target_time
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target_terminator = target_block.terminator()
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if isinstance(target_terminator, (ir.Delay, ir.Branch)):
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target_terminator.set_target(source_block)
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elif isinstance(target_terminator, ir.Parallel):
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if isinstance(target_terminator, ir.Parallel):
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target_terminator.replace_with(ir.Branch(source_block))
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else:
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assert False
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assert isinstance(target_terminator, (ir.Delay, ir.Branch))
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target_terminator.set_target(source_block)
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source_terminator = source_block.terminator()
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if isinstance(source_terminator, ir.Delay):
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old_decomp = source_terminator.decomposition()
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else:
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old_decomp = None
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if target_time_delta > 0:
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assert isinstance(source_terminator, ir.Delay)
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source_terminator.expr = iodelay.Const(target_time_delta)
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if isinstance(old_decomp, ir.Builtin) and \
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old_decomp.op in ("delay", "delay_mu"):
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new_decomp_expr = ir.Constant(target_time_delta, builtins.TInt64())
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new_decomp = ir.Builtin("delay_mu", [new_decomp_expr], builtins.TNone())
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new_decomp.loc = old_decomp.loc
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source_terminator.basic_block.insert(source_terminator, new_decomp)
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else:
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assert False # TODO
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source_terminator.replace_with(ir.Delay(iodelay.Const(target_time_delta), {},
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new_decomp, source_terminator.target()))
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else:
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source_terminator.replace_with(ir.Branch(source_terminator.target()))
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if old_decomp is not None:
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old_decomp.erase()
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target_block = source_block
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target_time = new_target_time
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|
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@ -7,7 +7,7 @@ import os
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from pythonparser import ast, diagnostic
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from llvmlite_artiq import ir as ll
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from ...language import core as language_core
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from .. import types, builtins, ir, iodelay
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from .. import types, builtins, ir
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llvoid = ll.VoidType()
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@ -787,6 +787,12 @@ class LLVMIRGenerator:
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elif insn.op == "at_mu":
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time, = insn.operands
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return self.llbuilder.store(self.map(time), self.llbuiltin("now"))
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elif insn.op == "delay_mu":
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interval, = insn.operands
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llnowptr = self.llbuiltin("now")
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llnow = self.llbuilder.load(llnowptr)
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lladjusted = self.llbuilder.add(llnow, self.map(interval))
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return self.llbuilder.store(lladjusted, llnowptr)
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else:
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assert False
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@ -1062,6 +1068,8 @@ class LLVMIRGenerator:
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def process_Branch(self, insn):
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return self.llbuilder.branch(self.map(insn.target()))
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|
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process_Delay = process_Branch
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|
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def process_BranchIf(self, insn):
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return self.llbuilder.cbranch(self.map(insn.condition()),
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self.map(insn.if_true()), self.map(insn.if_false()))
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@ -1141,17 +1149,3 @@ class LLVMIRGenerator:
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self.llbuilder.branch(self.map(insn.cleanup()))
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|
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return llexn
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|
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def process_Delay(self, insn):
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def map_delay(expr):
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if isinstance(expr, iodelay.Const):
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return ll.Constant(lli64, int(expr.value))
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else:
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assert False
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llnowptr = self.llbuiltin("now")
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llnow = self.llbuilder.load(llnowptr)
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lladjusted = self.llbuilder.add(llnow, map_delay(insn.expr))
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self.llbuilder.store(lladjusted, llnowptr)
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|
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return self.llbuilder.branch(self.map(insn.target()))
|
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|
|
|
|||
|
|
@ -18,8 +18,8 @@ def g():
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print("E", now_mu())
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|
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# CHECK-L: A 0
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# CHECK-L: C 0
|
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# CHECK-L: B 2
|
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# CHECK-L: C 2
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# CHECK-L: D 2
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# CHECK-L: E 4
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g()
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|
|
|
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|
|
@ -17,9 +17,9 @@ def g():
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#
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print("E", now_mu())
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|
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# CHECK-L: A 0
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# CHECK-L: C 0
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# CHECK-L: A 2
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# CHECK-L: D 2
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# CHECK-L: B 3
|
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# CHECK-L: D 3
|
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# CHECK-L: E 4
|
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g()
|
||||
|
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|
|||
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