Sebastien Bourdeauducq
d853604380
flake: update dependencies
2021-12-20 17:27:43 +08:00
Steve Fan
c0a7be0a90
llvm_ir: move stacksave before lltag alloca in build_rpc
...
Signed-off-by: Steve Fan <sf@m-labs.hk>
2021-12-19 00:07:07 +00:00
Sebastien Bourdeauducq
9e5e234af3
stop using explicit ProactorEventLoop on Windows
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It is now the default in Python.
2021-12-14 20:06:38 +08:00
Sebastien Bourdeauducq
352317df11
test_dataset_db: remove (too much breakage on Windows)
2021-12-14 19:27:15 +08:00
Sebastien Bourdeauducq
a518963a47
test_dataset_db: disable tests broken on windows
2021-12-14 19:19:22 +08:00
Sebastien Bourdeauducq
37f14d94d0
test_dataset_db: fix for windows
2021-12-14 19:07:17 +08:00
Sebastien Bourdeauducq
4f723e19a6
RELEASE_NOTES: update
2021-12-14 00:05:49 +08:00
Peter Drmota
7c664142a5
Simplified use of the AD9910 RAM feature ( #1584 )
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* coredevice: Change Urukul default single-tone profile to 7
This allows using the internal profile control in RAM modulation mode (which always starts to play back at profile 0) without competing for the content of the profile 0 register used in single tone mode.
Signed-off-by: Peter Drmota <peter.drmota@physics.ox.ac.uk>
* ad9910/set_mu: comment on caveats when setting register
* ad9910: avoid unnecessary write/param
Credit: Solution proposed by @pmldrmota in https://github.com/m-labs/artiq/pull/1584#issuecomment-987774353
* revert 1064fdff
(`set_mu()` comments)
158a7be7
had addressed this issue.
Co-authored-by: occheung <dc@m-labs.hk>
2021-12-13 23:44:03 +08:00
Sebastien Bourdeauducq
dad23b6981
coredevice/ad53xx: use len(list)
2021-12-09 12:40:01 +08:00
Sebastien Bourdeauducq
60cbde0820
flake: update dependencies
2021-12-09 12:35:33 +08:00
Etienne Wodey
33a9ca2684
tools/file_import: use SourceFileLoader
...
This allows loading modules from files with extensions not in
importlib.machinery.SOURCE_SUFFIXES
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-12-09 11:47:04 +08:00
Sébastien Bourdeauducq
311a818a49
Merge pull request #1544 from airwoodix/dataset-compression
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datasets: support compression in HDF5 archives
2021-12-06 12:43:19 +08:00
Sébastien Bourdeauducq
1def0d98c5
Merge branch 'master' into dataset-compression
2021-12-06 12:40:30 +08:00
Leon Riesebos
7ffe4dc2e3
coredevice: set default pow for ad9912 set_mu()
2021-12-06 12:34:55 +08:00
Leon Riesebos
9e3ea4e8ef
coredevice: fixed type annotations for AD9910
2021-12-06 12:34:55 +08:00
Sebastien Bourdeauducq
31ac6881df
update NAC3, restore original delays
2021-12-06 12:21:52 +08:00
Sebastien Bourdeauducq
61d3e22ea8
flake: update nac3
2021-12-05 14:37:33 +08:00
Sebastien Bourdeauducq
12512bfb2f
flake: get rid of TARGET_AR
2021-12-05 14:37:09 +08:00
Sebastien Bourdeauducq
3f3186005e
flake: get rid of TARGET_AR
2021-12-05 14:31:49 +08:00
Sebastien Bourdeauducq
e34f4cc99b
language: add floor64 and ceil64
2021-12-04 20:13:00 +08:00
Sebastien Bourdeauducq
12c39aaaae
coredevice/adf5356: use nac3 floor/ceil
2021-12-04 19:04:48 +08:00
Sebastien Bourdeauducq
2059fd375e
language: add virtual
2021-12-04 19:03:39 +08:00
Sebastien Bourdeauducq
1bdf301e2a
flake: update NAC3
2021-12-04 19:03:19 +08:00
Steve Fan
4a6bea479a
Host report for async error upon kernel termination ( #1791 )
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Closes #1644
2021-12-04 13:33:24 +08:00
Sebastien Bourdeauducq
9bbf7eb485
flake: use ed25519 key for hitl
2021-12-03 18:35:10 +08:00
mwojcik
f8a649deda
release notes: mention 100mhz support
2021-12-03 17:19:11 +08:00
mwojcik
7953f3d705
kc705: add drtio 100mhz clk switch
2021-12-03 17:19:11 +08:00
mwojcik
f281112779
satman: add 100mhz si5324 settings
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siphaser: add calculated vco for 100mhz comment
2021-12-03 17:19:11 +08:00
mwojcik
eec3ea6589
siphaser: add support for 100mhz rtio
2021-12-03 17:19:11 +08:00
Sebastien Bourdeauducq
163f5d9128
flake: debug hitl auth failures
2021-12-03 17:16:54 +08:00
Etienne Wodey
9f830b86c0
kasli: add SED lanes count option to HW description JSON file ( #1745 )
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Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-12-03 17:05:35 +08:00
Sebastien Bourdeauducq
b8e7add785
language: remove deprecated set_dataset(..., save=...)
2021-12-01 22:41:34 +08:00
Sebastien Bourdeauducq
5a923a0956
flake: switch to nixos- branch
2021-12-01 22:39:24 +08:00
Sebastien Bourdeauducq
6a09b92fb3
examples/nac3devices: fix mirny clocking
2021-11-29 18:15:06 +08:00
Sebastien Bourdeauducq
233c5f4bfb
update NAC3
2021-11-29 18:14:47 +08:00
Sebastien Bourdeauducq
b2f7022e0a
examples/nac3devices: demonstrate new capabilities
2021-11-28 12:48:18 +08:00
Sebastien Bourdeauducq
e45c194c49
coredevice/adf5356: port to NAC3
2021-11-28 12:38:23 +08:00
Sebastien Bourdeauducq
519e3d64d8
flake: update dependencies
2021-11-28 12:18:55 +08:00
David Nadlinger
c6039479e4
compiler: Add lit test for call site attributes [nfc]
2021-11-27 04:46:07 +00:00
David Nadlinger
63b5727a0c
compiler: Also emit byval argument attributes at call sites
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See previous commit.
GitHub: Fixes #1599 .
2021-11-27 04:45:50 +00:00
David Nadlinger
9b01db3d11
compiler: Emit sret call site argument attributes
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LLVM 6 seemed not to mind the mismatch, but more recent
versions produce miscompilations without this.
Needs llvmlite support (GitHub: numba/llvmlite#702 ).
2021-11-27 04:44:41 +00:00
Sebastien Bourdeauducq
6a433b2fce
artiq_sinara_tester: test Urukul attenuator digital control
2021-11-24 18:57:16 +08:00
Sebastien Bourdeauducq
5800496425
coredevice/adf5356_reg: port to NAC3
2021-11-24 16:54:58 +08:00
occheung
5ed9e49b94
changelog: update drtio protocol
2021-11-24 12:00:56 +08:00
occheung
9423428bb0
drtio: fix crc32 offset address
2021-11-24 12:00:56 +08:00
Sebastien Bourdeauducq
29f42ccd8a
coredevice/mirny: port to NAC3
2021-11-23 17:13:43 +08:00
Sebastien Bourdeauducq
f5a5b7a22a
examples: add nac3devices
2021-11-23 16:41:29 +08:00
Sebastien Bourdeauducq
3a6fcd069d
remove old examples
2021-11-23 16:37:40 +08:00
Sebastien Bourdeauducq
d8e1a22bdf
coredevice/ad53xx: remove problematic default param
2021-11-23 16:12:36 +08:00
Sebastien Bourdeauducq
cbc767119d
flake: update dependencies
2021-11-23 15:21:56 +08:00