Commit Graph

7806 Commits

Author SHA1 Message Date
Robert Jördens f0e87d2e59 grabber: remove unused code 2019-09-20 15:26:12 +02:00
Sebastien Bourdeauducq 4e77be0511 firmware: add Cargo.lock header that newer cargo wants 2019-09-17 15:22:14 +08:00
Sebastien Bourdeauducq 694b85f37a doc: only one hydra build for conda packages 2019-09-13 09:43:12 +08:00
Charles Baynham b7abf2fb53 pyon: Handle inf in decoding 2019-09-12 09:46:05 +08:00
Sebastien Bourdeauducq 38fca01189 artiq_ddb_template: add su-servo support (#1343) 2019-09-11 15:52:25 +08:00
Sebastien Bourdeauducq 991c686d72 kasli_generic,eem: print RTIO channels in hex like artiq_ddb_template 2019-09-11 15:51:53 +08:00
Robert Jördens f4dd7e5e29 kasli_tester: init urukul channel before calibrating
Otherwise the DDS is not initialized and with a cold system it fails to
find IO_UPDATE edges.

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-09-11 07:16:35 +00:00
Sebastien Bourdeauducq 7492a59f6d kasli_generic: add SUServo support (#1343) 2019-09-11 11:12:48 +08:00
David Nadlinger 6d6f66338b runtime: Update core config panic_reset command suggestion message 2019-09-10 19:31:19 +01:00
Charles Baynham ddd34e5a9c influx_schedule: log repo_rev along with other info
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2019-09-10 13:46:28 +02:00
Sebastien Bourdeauducq 98caaebade consistent use of 'class name' terminology to select a class within an experiment file. Closes #1348 2019-09-09 15:16:33 +08:00
Sebastien Bourdeauducq 21021beb08 kasli: remove opticlock (moved to kasli_generic) 2019-09-09 15:03:10 +08:00
Sebastien Bourdeauducq 436662be52 ddb_template: add Novogorny support 2019-09-09 15:00:45 +08:00
Sebastien Bourdeauducq 69c2acd9d7 ddb_template: sampler cnv is ttl not spi 2019-09-09 14:57:42 +08:00
Sebastien Bourdeauducq cfb5ef5548 kasli_generic: add Novogorny support 2019-09-09 14:54:34 +08:00
Sebastien Bourdeauducq 0b9168994f Revert "dashboard: Sort TTL moninj channels by name"
This reverts commit b3db3ea6fc.

Closes #1288
2019-09-06 11:17:10 +08:00
Charles Baynham d31f30a436 influxdb_schedule: fix typo in parameter name 2019-09-05 17:42:56 +02:00
Charles Baynham 7ac8feea19 influxdb_schedule: Handle all exceptions 2019-09-05 17:42:56 +02:00
Sebastien Bourdeauducq 1fb317778a eem/grabber: allow third EEM to be specified 2019-08-29 18:58:12 +08:00
Astro 90e8e074cd firmware: turn errors into &str for remote_i2c as well
should resolve breakage on a few targets/variants introduced by PR #1351
2019-08-29 09:05:47 +08:00
Astro 71b3c66af9 firmware: conditionally compile has_si5324
avoids unused warnings where this module is not used.
2019-08-29 09:04:54 +08:00
Sebastien Bourdeauducq 959679d8b7 wrpll: add I2CMasterMachine 2019-08-27 18:02:05 +08:00
Sebastien Bourdeauducq c03c35f375 Revert "compiler: armv7-unknown-linux-gnueabihf -> armv7-linux-gnueabihf"
rustc insists on -unknown.

This reverts commit cf47fa44d8.
2019-08-26 11:23:00 +08:00
Sebastien Bourdeauducq cf47fa44d8 compiler: armv7-unknown-linux-gnueabihf -> armv7-linux-gnueabihf 2019-08-26 11:12:49 +08:00
Sebastien Bourdeauducq 98cd9a539c compiler: support Cortex A9 target 2019-08-26 10:46:22 +08:00
Astro afe162ceca firmware: don't unwrap() but propagate pca9548 errors 2019-08-17 09:15:26 +08:00
Astro a8aabd3815 firwmare: turn i2c errors into &str 2019-08-17 09:15:26 +08:00
Astro 8fc5ce902f firmware: let kasli obtain default hardware_addr from i2c_eeprom 2019-08-17 09:15:26 +08:00
Astro d666f3d573 firmware: factor out mod pca9548 from si5324
orepares for further i2c devices.
2019-08-17 09:15:26 +08:00
Sebastien Bourdeauducq 1fd2322662 wrpll/thls: implement global writeback 2019-08-15 23:16:17 +08:00
Sebastien Bourdeauducq 24082b687e wrpll/filters: clean up and make compatible with thls 2019-08-15 17:58:22 +08:00
Sebastien Bourdeauducq 9331fafab0 wrpll/filters: new code from Weida 2019-08-15 17:24:40 +08:00
Sebastien Bourdeauducq 5c3974c265 wrpll/thls: fix opcode decoding 2019-08-15 17:12:48 +08:00
Sebastien Bourdeauducq 19620948bf wrpll/thls: implement signed numbers 2019-08-15 17:04:17 +08:00
Sebastien Bourdeauducq efc43142a6 wrpll/thls: implement min/max 2019-08-15 16:42:59 +08:00
Sebastien Bourdeauducq 44969b03ad wrpll/thls: rework instruction decoding 2019-08-15 15:55:13 +08:00
Sebastien Bourdeauducq 2776c5b16b wrpll/thls: support mulshift 2019-08-15 15:07:13 +08:00
Robert Jördens e9b78b62db kasli_tester/zotino: always alternate voltage sign
Before the voltages on a second Zotino would start 2.1, 1.9, 2.2, 1.8
..., 3.6, 0.4 and overlap with the voltages on the first.
Now the voltages are 2.1, -2.1, 2.2, -2.2, ..., 3.6, -3.6 which allows
quick identification of card/channel and easy prediction when deploying.
2019-08-06 17:38:55 +02:00
Sebastien Bourdeauducq 5f8acb3f96 manual: fix location of shell-dev.nix (#1346) 2019-08-05 13:34:35 +08:00
Sebastien Bourdeauducq f861459ace wrpll: add filter algorithms (WIP) 2019-08-02 13:23:16 +08:00
David Nadlinger 99e490f9ff coredevice/suservo: Slightly reword get_adc[_mu]() docstring for clarity
This hopefully suggests a bit better that the value is the last one
fetched by the servo (i.e. needs the servo active to update), rather
than somehow requesting a new sample to be taken.
2019-07-30 12:22:08 +01:00
David Nadlinger 4446ebf9ca README: Fix link to manual 2019-07-30 11:28:12 +01:00
Robert Jördens 3f0657f2a8 artiq_influxdb_schedule: add schedule logger
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-07-26 14:47:18 +02:00
Sebastien Bourdeauducq 7a5dcbe60e wrpll/thls: support processor start/stop 2019-07-24 18:51:33 +08:00
Sebastien Bourdeauducq b8870997d0 doc: clarify TTL direction control with buffered cards 2019-07-24 10:04:45 +08:00
Sebastien Bourdeauducq 623446f82c wrpll/thls: simple simulation demo 2019-07-20 18:50:57 +08:00
Sebastien Bourdeauducq 831b3514d3 wrpll/thls: stop at return statement 2019-07-19 16:27:29 +08:00
Sebastien Bourdeauducq 930291f606 update conda channel URL 2019-07-19 16:11:03 +08:00
Sebastien Bourdeauducq e95b7b9d4b manual: fix typos 2019-07-18 09:30:21 +08:00
Sebastien Bourdeauducq 75e8d54c27 install-with-conda: remove unnecessary import 2019-07-18 00:52:31 +08:00