Unification-based inference for regions is useful with a language
that has let bindings (which would propagate the regions) and
functions polymorphic over regions. For reasons of simplicity,
ARTIQ has neither, and making unification-based inference work would
essentially mean adding region coercions between most AST nodes,
and having every source subexpression have its own region variable,
with the appropriate subtyping relationship.
It's simpler to just keep that state outside of typedtree.
As long as you use --simulation, the driver will be in simulation mode.
Even if you specify a --device or --channels.
That can allow you to just switch to simulation mode by adding
--simulation in the device database without having to
remove the serial number or device path/name.
Since the package implements a typechecker along with a code generator,
and the typechecker will be run before or together with transformations,
this name is more descriptive.
* remove xtrig from the target as it is not usually connected (used for
dds_clock) and ignore PMT2/BTN2 as C:15 is used for dds_clock.
* this also aligns the ttl channel numbers with kc705/nist_qc1 (two pmt
inputs followed by 16 ttl outputs followed by leds)
this way the import stanza shows what is imported: just experiment language
related components
keep the imports also at top level until experiments have transitioned
the top level __init__.py should build and expose the entire namespace of artiq
related things, like hdf5 analysis tools, frontend components (like experiment
running api), deployment tools etc.
