2014-08-28 16:56:48 +08:00
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#ifndef __DDS_H
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#define __DDS_H
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2015-03-12 20:14:06 +08:00
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#include <hw/common.h>
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2015-07-08 23:22:43 +08:00
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#include <generated/csr.h>
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2015-04-11 21:32:01 +08:00
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#include <generated/mem.h>
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2015-03-12 20:14:06 +08:00
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2015-05-08 16:51:54 +08:00
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/* Maximum number of commands in a batch */
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#define DDS_MAX_BATCH 16
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2015-07-08 23:22:43 +08:00
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#ifdef DDS_AD9858
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#define DDS_CFR0 0x00
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#define DDS_CFR1 0x01
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#define DDS_CFR2 0x02
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#define DDS_CFR3 0x03
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2015-03-12 20:14:06 +08:00
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#define DDS_FTW0 0x0a
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#define DDS_FTW1 0x0b
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#define DDS_FTW2 0x0c
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#define DDS_FTW3 0x0d
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#define DDS_POW0 0x0e
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#define DDS_POW1 0x0f
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2015-05-08 14:44:39 +08:00
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#define DDS_FUD 0x40
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2015-03-12 20:14:06 +08:00
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#define DDS_GPIO 0x41
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2015-07-08 23:22:43 +08:00
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#endif
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#ifdef DDS_AD9914
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#define DDS_CFR1L 0x01
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#define DDS_CFR1H 0x03
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#define DDS_CFR2L 0x05
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#define DDS_CFR2H 0x07
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#define DDS_CFR3L 0x09
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#define DDS_CFR3H 0x0b
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#define DDS_CFR4L 0x0d
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#define DDS_CFR4H 0x0f
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#define DDS_FTWL 0x2d
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#define DDS_FTWH 0x2f
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#define DDS_POW 0x31
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2015-08-27 10:47:44 +08:00
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#define DDS_ASF 0x33
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2015-07-08 23:22:43 +08:00
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#define DDS_FUD 0x80
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#define DDS_GPIO 0x81
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#endif
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#ifdef DDS_AD9858
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#define DDS_POW_WIDTH 14
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#endif
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#ifdef DDS_AD9914
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#define DDS_POW_WIDTH 16
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#endif
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2015-03-12 20:14:06 +08:00
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2015-05-08 14:44:39 +08:00
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enum {
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PHASE_MODE_CONTINUOUS = 0,
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PHASE_MODE_ABSOLUTE = 1,
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PHASE_MODE_TRACKING = 2
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};
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2015-05-09 17:11:34 +08:00
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void dds_init_all(void);
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2015-05-08 14:44:39 +08:00
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void dds_init(long long int timestamp, int channel);
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2015-05-08 16:51:54 +08:00
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void dds_batch_enter(long long int timestamp);
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void dds_batch_exit(void);
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2015-05-08 14:44:39 +08:00
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void dds_set(long long int timestamp, int channel,
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2015-09-06 03:14:01 +08:00
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unsigned int ftw, unsigned int pow, int phase_mode, unsigned int amplitude);
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2014-08-28 16:56:48 +08:00
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#endif /* __DDS_H */
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