RTIO/SYS Clock merge #212
@ -68,30 +68,11 @@ fn get_rtio_clock_cfg(cfg: &Config) -> RtioClock {
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fn init_rtio(timer: &mut GlobalTimer, _clk: RtioClock) {
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fn init_rtio(timer: &mut GlobalTimer, _clk: RtioClock) {
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#[cfg(has_rtio_crg_clock_sel)]
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let clock_sel = match _clk {
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RtioClock::Ext0_Bypass => {
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info!("Using bypassed external clock");
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1
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},
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RtioClock::Int_125 => {
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info!("Using internal RTIO clock");
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0
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},
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_ => {
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warn!("rtio_clock setting '{:?}' is not supported. Using default internal RTIO clock instead", _clk);
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0
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}
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};
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unsafe {
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unsafe {
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pl::csr::rtio_crg::pll_reset_write(1);
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pl::csr::sys_crg::pll_reset_write(0);
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#[cfg(has_rtio_crg_clock_sel)]
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pl::csr::rtio_crg::clock_sel_write(clock_sel);
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pl::csr::rtio_crg::pll_reset_write(0);
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}
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}
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timer.delay_ms(1);
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timer.delay_ms(1);
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let locked = unsafe { pl::csr::rtio_crg::pll_locked_read() != 0 };
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let locked = unsafe { pl::csr::sys_crg::pll_locked_read() != 0 };
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if locked {
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if locked {
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info!("RTIO PLL locked");
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info!("RTIO PLL locked");
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} else {
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} else {
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