Next-generation FPGA SoC toolkit

Sebastien Bourdeauducq 1bf9b5eb2b add VexRiscv		2019-04-05 18:58:11 +08:00
compilers	reorganize	2019-04-01 11:05:08 +08:00
cores	add VexRiscv	2019-04-05 18:58:11 +08:00
eda	add VexRiscv	2019-04-05 18:58:11 +08:00
examples	minor cleanup	2019-03-25 23:41:22 +08:00
heavycomps	add simple test for UART	2019-03-28 19:39:30 +08:00
.gitignore	add nix-build results to .gitignore	2019-03-25 23:36:52 +08:00
default.nix	style	2019-04-04 23:43:46 +08:00
derivations.nix	add VexRiscv	2019-04-05 18:58:11 +08:00
heavycomps.nix	add component library with UART	2019-03-19 16:52:02 +08:00
release.nix	reorganize Nix files to expose lib functions and derivations properly	2019-03-25 16:07:50 +08:00