Commit Graph

17 Commits (af51f6fe8ff1e5d0ba2b003778ca118d9c216036)

Author SHA1 Message Date
Sebastien Bourdeauducq af51f6fe8f use nmigen build system, upstream yosys, reorganize 2019-07-03 18:51:54 +08:00
Sebastien Bourdeauducq 4af5e6fb9e add experimental LiteDRAM package 2019-06-13 09:36:12 +08:00
Sebastien Bourdeauducq 4c7ca4a8d1 add experimental LiteX package 2019-06-12 17:22:54 +08:00
Sebastien Bourdeauducq 92671d534c nmigen-boards: add 2019-06-11 22:53:03 +08:00
Sebastien Bourdeauducq c7bda2b144 compile Rust core crate for riscv32i 2019-06-08 21:52:33 +08:00
Sebastien Bourdeauducq 03dc4f6e32 add RISCV GCC
Needed to refresh riscv and riscv-rt Rust crates.
2019-06-08 21:50:47 +08:00
Sebastien Bourdeauducq 8388018db7 also build riscv64 binutils 2019-06-08 19:25:38 +08:00
Sebastien Bourdeauducq ad4f00e93d simplesoc_ecp5: load firmware 2019-06-06 18:11:54 +08:00
Sebastien Bourdeauducq a203307108 reorganize 2019-06-06 17:25:11 +08:00
Sebastien Bourdeauducq 5436920008 add ECP5 helloworld 2019-04-26 18:22:23 +08:00
Sebastien Bourdeauducq 3b2f6a222e cleanup 2019-04-26 17:43:31 +08:00
Sebastien Bourdeauducq e56d2ad3c8 style 2019-04-04 23:43:46 +08:00
Sebastien Bourdeauducq 466d85e719 reorganize 2019-04-01 11:05:08 +08:00
Sebastien Bourdeauducq 38ccee5c01 reorganize Nix files to expose lib functions and derivations properly 2019-03-25 16:07:50 +08:00
Sebastien Bourdeauducq 0f512c762b use patched yosys 2019-03-25 10:12:18 +08:00
Sebastien Bourdeauducq 55e12d3185 add component library with UART 2019-03-19 16:52:02 +08:00
Sebastien Bourdeauducq cf6ebc9953 package minerva and dependencies 2019-03-19 15:46:28 +08:00