 Sebastien Bourdeauducq
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4af5e6fb9e
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add experimental LiteDRAM package
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2019-06-13 09:36:12 +08:00 |
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Sebastien Bourdeauducq
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4c7ca4a8d1
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add experimental LiteX package
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2019-06-12 17:22:54 +08:00 |
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Sebastien Bourdeauducq
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92671d534c
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nmigen-boards: add
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2019-06-11 22:53:03 +08:00 |
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Sebastien Bourdeauducq
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c7bda2b144
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compile Rust core crate for riscv32i
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2019-06-08 21:52:33 +08:00 |
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Sebastien Bourdeauducq
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03dc4f6e32
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add RISCV GCC
Needed to refresh riscv and riscv-rt Rust crates.
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2019-06-08 21:50:47 +08:00 |
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Sebastien Bourdeauducq
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8388018db7
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also build riscv64 binutils
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2019-06-08 19:25:38 +08:00 |
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Sebastien Bourdeauducq
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ad4f00e93d
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simplesoc_ecp5: load firmware
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2019-06-06 18:11:54 +08:00 |
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Sebastien Bourdeauducq
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a203307108
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reorganize
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2019-06-06 17:25:11 +08:00 |
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Sebastien Bourdeauducq
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5436920008
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add ECP5 helloworld
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2019-04-26 18:22:23 +08:00 |
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Sebastien Bourdeauducq
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3b2f6a222e
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cleanup
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2019-04-26 17:43:31 +08:00 |
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Sebastien Bourdeauducq
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e56d2ad3c8
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style
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2019-04-04 23:43:46 +08:00 |
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Sebastien Bourdeauducq
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466d85e719
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reorganize
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2019-04-01 11:05:08 +08:00 |
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Sebastien Bourdeauducq
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38ccee5c01
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reorganize Nix files to expose lib functions and derivations properly
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2019-03-25 16:07:50 +08:00 |
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Sebastien Bourdeauducq
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0f512c762b
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use patched yosys
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2019-03-25 10:12:18 +08:00 |
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Sebastien Bourdeauducq
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55e12d3185
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add component library with UART
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2019-03-19 16:52:02 +08:00 |
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Sebastien Bourdeauducq
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cf6ebc9953
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package minerva and dependencies
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2019-03-19 15:46:28 +08:00 |