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artiq-zynq
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added kasli-soc variants based on demo

This commit is contained in:
mwojcik 2021-08-03 11:54:44 +02:00
parent 6a9729bede
commit 98b3b74bc2
3 changed files with 122 additions and 0 deletions
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2
default.nix
View File

@ -142,5 +142,7 @@ in
(build { target = "zc706"; variant = "acpki_master"; }) //
(build { target = "zc706"; variant = "acpki_satellite"; }) //
(build { target = "kasli_soc"; variant = "demo"; json = ./demo.json; }) //
(build { target = "kasli_soc"; variant = "master"; json = ./kasli-soc-master.json; }) //
(build { target = "kasli_soc"; variant = "satellite"; json = ./kasli-soc-satellite.json; }) //
{ inherit zynq-rs; }
)

60
kasli-soc-master.json Normal file
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@ -0,0 +1,60 @@
{
"target": "kasli_soc",
"variant": "master",
"hw_rev": "v1.0",
"base": "master",
"peripherals": [
{
"type": "grabber",
"ports": [0]
},
{
"type": "dio",
"ports": [1],
"bank_direction_low": "input",
"bank_direction_high": "output"
},
{
"type": "dio",
"ports": [2],
"bank_direction_low": "output",
"bank_direction_high": "output"
},
{
"type": "urukul",
"dds": "ad9910",
"ports": [3, 4],
"clk_sel": 2
},
{
"type": "zotino",
"ports": [5]
},
{
"type": "sampler",
"ports": [6, 7]
},
{
"type": "mirny",
"ports": [8],
"clk_sel": 1,
"refclk": 125e6
},
{
"type": "fastino",
"ports": [9]
},
{
"type": "dio",
"ports": [10],
"bank_direction_low": "input",
"bank_direction_high": "input"
},
{
"type": "dio",
"ports": [11],
"bank_direction_low": "output",
"bank_direction_high": "input"
}
]
}

60
kasli-soc-satellite.json Normal file
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@ -0,0 +1,60 @@
{
"target": "kasli_soc",
"variant": "satellite",
"hw_rev": "v1.0",
"base": "satellite",
"peripherals": [
{
"type": "grabber",
"ports": [0]
},
{
"type": "dio",
"ports": [1],
"bank_direction_low": "input",
"bank_direction_high": "output"
},
{
"type": "dio",
"ports": [2],
"bank_direction_low": "output",
"bank_direction_high": "output"
},
{
"type": "urukul",
"dds": "ad9910",
"ports": [3, 4],
"clk_sel": 2
},
{
"type": "zotino",
"ports": [5]
},
{
"type": "sampler",
"ports": [6, 7]
},
{
"type": "mirny",
"ports": [8],
"clk_sel": 1,
"refclk": 125e6
},
{
"type": "fastino",
"ports": [9]
},
{
"type": "dio",
"ports": [10],
"bank_direction_low": "input",
"bank_direction_high": "input"
},
{
"type": "dio",
"ports": [11],
"bank_direction_low": "output",
"bank_direction_high": "input"
}
]
}