From 98b3b74bc2703e3b593a75a46c013ea125916e41 Mon Sep 17 00:00:00 2001
From: mwojcik <mw@m-labs.hk>
Date: Tue, 3 Aug 2021 11:54:44 +0200
Subject: [PATCH] added kasli-soc variants based on demo

---
 default.nix              |  2 ++
 kasli-soc-master.json    | 60 ++++++++++++++++++++++++++++++++++++++++
 kasli-soc-satellite.json | 60 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 122 insertions(+)
 create mode 100644 kasli-soc-master.json
 create mode 100644 kasli-soc-satellite.json

diff --git a/default.nix b/default.nix
index 022892ad..5c8f0090 100644
--- a/default.nix
+++ b/default.nix
@@ -142,5 +142,7 @@ in
     (build { target = "zc706"; variant = "acpki_master"; }) //
     (build { target = "zc706"; variant = "acpki_satellite"; }) //
     (build { target = "kasli_soc"; variant = "demo"; json = ./demo.json; }) //
+    (build { target = "kasli_soc"; variant = "master"; json = ./kasli-soc-master.json; }) //
+    (build { target = "kasli_soc"; variant = "satellite"; json = ./kasli-soc-satellite.json; }) //
     { inherit zynq-rs; }
   )
diff --git a/kasli-soc-master.json b/kasli-soc-master.json
new file mode 100644
index 00000000..1de434fa
--- /dev/null
+++ b/kasli-soc-master.json
@@ -0,0 +1,60 @@
+{
+    "target": "kasli_soc",
+    "variant": "master",
+    "hw_rev": "v1.0",
+    "base": "master",
+    "peripherals": [
+        {
+            "type": "grabber",
+            "ports": [0]
+        },
+        {
+            "type": "dio",
+            "ports": [1],
+            "bank_direction_low": "input",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "ports": [2],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "urukul",
+            "dds": "ad9910",
+            "ports": [3, 4],
+            "clk_sel": 2
+        },
+        {
+            "type": "zotino",
+            "ports": [5]
+        },
+        {
+            "type": "sampler",
+            "ports": [6, 7]
+        },
+        {
+            "type": "mirny",
+            "ports": [8],
+            "clk_sel": 1,
+            "refclk": 125e6
+        },
+        {
+            "type": "fastino",
+            "ports": [9]
+        },
+        {
+            "type": "dio",
+            "ports": [10],
+            "bank_direction_low": "input",
+            "bank_direction_high": "input"
+        },
+        {
+            "type": "dio",
+            "ports": [11],
+            "bank_direction_low": "output",
+            "bank_direction_high": "input"
+        }
+    ]
+}
diff --git a/kasli-soc-satellite.json b/kasli-soc-satellite.json
new file mode 100644
index 00000000..7eafabfa
--- /dev/null
+++ b/kasli-soc-satellite.json
@@ -0,0 +1,60 @@
+{
+    "target": "kasli_soc",
+    "variant": "satellite",
+    "hw_rev": "v1.0",
+    "base": "satellite",
+    "peripherals": [
+        {
+            "type": "grabber",
+            "ports": [0]
+        },
+        {
+            "type": "dio",
+            "ports": [1],
+            "bank_direction_low": "input",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "ports": [2],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "urukul",
+            "dds": "ad9910",
+            "ports": [3, 4],
+            "clk_sel": 2
+        },
+        {
+            "type": "zotino",
+            "ports": [5]
+        },
+        {
+            "type": "sampler",
+            "ports": [6, 7]
+        },
+        {
+            "type": "mirny",
+            "ports": [8],
+            "clk_sel": 1,
+            "refclk": 125e6
+        },
+        {
+            "type": "fastino",
+            "ports": [9]
+        },
+        {
+            "type": "dio",
+            "ports": [10],
+            "bank_direction_low": "input",
+            "bank_direction_high": "input"
+        },
+        {
+            "type": "dio",
+            "ports": [11],
+            "bank_direction_low": "output",
+            "bank_direction_high": "input"
+        }
+    ]
+}