srenblad/zynq-rs
1
0
Fork 0
forked from M-Labs/zynq-rs
Code Pull Requests Activity
Bare-metal Rust on Zynq-7000
506 Commits 9 Branches 0 Tags 2.1 MiB
Rust 96.3%
Assembly 2.6%
Nix 1%
0efc7a616f
Go to file
pca006132 0efc7a616f libconfig: implemented config write 
Config write and config remove are now implemented.
Config keys are now treated case insensitively, which is consistence to
the filesystem behavior.
BOOT.BIN can be replaced by setting the config key "boot".
2020-10-30 16:11:18 +08:00
.cargo cargo: remove unmaintained runner 2020-09-09 15:01:39 +08:00
experiments experiments: fix zc706 build 2020-09-09 21:30:56 +08:00
libasync update some dependencies 2020-10-13 18:28:42 +08:00
libboard_zynq fix ps7_init compilation error and warnings 2020-10-01 00:17:47 +08:00
libconfig libconfig: implemented config write 2020-10-30 16:11:18 +08:00
libcoreio add libconfig, libcoreio, szl from artiq-zynq a277e89b3ad; update dependencies 2020-09-09 17:56:50 +08:00
libcortex_a9 add Red Pitaya support (WIP) 2020-09-09 20:10:05 +08:00
libregister update authors in cargo.toml 2020-09-09 19:36:25 +08:00
libsupport_zynq add Red Pitaya support (WIP) 2020-09-09 20:10:05 +08:00
nix update Rust 2020-10-13 18:25:39 +08:00
openocd add Red Pitaya support (WIP) 2020-09-09 20:10:05 +08:00
szl libconfig: make default IP/MAC depend on board 2020-10-14 12:53:32 +08:00
.gitignore remove zc706.elf from gitignore 2020-01-16 02:13:11 +08:00
armv7-none-eabihf.json define custom target, use with cargo-xbuild 2019-08-06 22:03:04 +02:00
Cargo.lock update some dependencies 2020-10-13 18:28:42 +08:00
Cargo.toml add libconfig, libcoreio, szl from artiq-zynq a277e89b3ad; update dependencies 2020-09-09 17:56:50 +08:00
default.nix add SZL for Red Pitaya 2020-10-14 12:35:23 +08:00
README.md README: add introduction 2020-09-29 16:27:44 +08:00
remote_run.sh add remote run script 2020-06-04 19:57:52 +08:00
shell.nix expose patched cargo-xbuild 2020-10-13 18:43:37 +08:00
xbuild_writable_lockfile.diff patch cargo-xbuild to ensure copied Cargo.lock is writable 2020-10-13 18:27:52 +08:00

README.md

Bare-metal Rust on Zynq-7000

Supported features:

  • Clocking setup
  • UART
  • SDRAM setup
  • Ethernet with smoltcp and async-await on TCP sockets
  • SD card
  • PL programming and startup
  • Pure Rust SZL first-stage bootloader, with SD boot and netboot
  • Control of second CPU core and message passing, with async-await support

Supported boards:

  • ZC706
  • Red Pitaya (note: SDRAM issues, worked around using ps7_init)
  • Cora Z7-10 (note: SDRAM issues)

Build

nix-shell --command "cargo xbuild --release -p experiments"

Currently the ELF output is placed at target/armv7-none-eabihf/release/experiments

Debug

Running on the ZC706

nix-shell --command "cargo xbuild --release -p experiments"
cd openocd
openocd -f zc706.cfg

Running on the Cora Z7-10

nix-shell --command "cd experiments && cargo xbuild --release --no-default-features --features=target_cora_z7_10"
cd openocd
openocd -f cora-z7-10.cfg

Loading a bitstream into volatile memory

openocd -f zc706.cfg -c "pld load 0 blinker_migen.bit; exit"