update readme for build-std

update cargo lockfile
update fatfs dependency
2025-04-11 11:17:21 +08:00 · 2025-04-11 11:17:21 +08:00 · 2025-04-11 11:17:21 +08:00 · 2025-04-11 11:17:21 +08:00 · 2025-03-28 14:54:42 +08:00 · 2025-03-19 15:13:29 +08:00
23 changed files with 609 additions and 141 deletions
--- a/.cargo/config
+++ b/.cargo/config
@ -1,7 +1,6 @@
 [target.armv7-none-eabihf]
 rustflags = [
  "-C", "link-arg=-Tlink.x",
-  "-C", "target-feature=a9,armv7-a,neon",
  "-C", "target-cpu=cortex-a9",
 ]

--- a/Cargo.lock
+++ b/Cargo.lock
@ -2,6 +2,51 @@
 # It is not intended for manual editing.
 version = 3

+[[package]]
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+dependencies = [
+ "cpp_demangle",
+ "fallible-iterator",
+ "gimli",
+ "memmap2",
+ "object",
+ "rustc-demangle",
+ "smallvec",
+]
+
+[[package]]
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+
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+checksum = "512761e0bb2578dd7380c6baaa0f4ce03e84f95e960231d1dec8bf4d7d6e2627"
+
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+dependencies = [
+ "cfg-if",
+ "once_cell",
+ "version_check",
+ "zerocopy",
+]
+
+[[package]]
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+checksum = "0942ffc6dcaadf03badf6e6a2d0228460359d5e34b57ccdc720b7382dfbd5ec5"
+
 [[package]]
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 version = "0.10.1"
@ -16,9 +61,9 @@ checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a"

 [[package]]
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-checksum = "60f0b0d4c0a382d2734228fd12b5a6b5dac185c60e938026fd31b265b94f9bd2"
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@ -34,15 +79,55 @@ checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd"

 [[package]]
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+ "cfg-if",
+ "libc",
+ "windows-sys",
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@ -66,10 +151,16 @@ dependencies = [
 "log",
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+[[package]]
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 dependencies = [
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 "byteorder",
@ -77,6 +168,57 @@ dependencies = [
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+
 [[package]]
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@ -84,7 +226,6 @@ dependencies = [
 "embedded-hal",
 "libcortex_a9",
 "nb 1.0.0",
- "pin-utils",
 "smoltcp",
 ]

@ -104,6 +245,12 @@ dependencies = [
 "volatile-register",
 ]

+[[package]]
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+
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@ -136,13 +283,39 @@ dependencies = [
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 version = "0.0.0"
 dependencies = [
+ "addr2line",
+ "allocator-api2",
+ "byteorder",
 "cc",
 "compiler_builtins",
+ "dlmalloc",
+ "fortanix-sgx-abi",
+ "getopts",
+ "hashbrown",
+ "hermit-abi",
 "libboard_zynq",
+ "libc",
 "libcortex_a9",
 "libregister",
 "linked_list_allocator",
+ "memchr",
+ "miniz_oxide 0.7.2",
+ "object",
+ "r-efi",
+ "r-efi-alloc",
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+ "rustc-demangle",
+ "unicode-width",
+ "unwinding",
+ "wasi",
+ "windows-targets",
+ "windows_aarch64_gnullvm",
+ "windows_aarch64_msvc",
+ "windows_i686_gnu",
+ "windows_i686_msvc",
+ "windows_x86_64_gnu",
+ "windows_x86_64_gnullvm",
+ "windows_x86_64_msvc",
 ]

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@ -166,6 +339,39 @@ version = "0.7.2"
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@ -182,10 +388,54 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
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@ -193,6 +443,29 @@ version = "1.0.0"
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@ -204,6 +477,29 @@ dependencies = [
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+[[package]]
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+ "unicode-ident",
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@ -218,12 +514,50 @@ dependencies = [
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+ "libc",
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--- a/README.md
+++ b/README.md
@ -28,11 +28,11 @@ You can build SZL or experiments crate for the platform of your choice by using
 nix build .#coraz7-experiments
 ```

-Alternatively, you can still use ``cargo xbuild`` within ``nix develop`` shell.
+Alternatively, you can still use ``cargo build -Zbuild-std=core,compiler_builtins,alloc`` within ``nix develop`` shell.

 ```shell
 nix develop
-cargo xbuild --release -p experiments
+cargo build -Zbuild-std=core,compiler_builtins,alloc --release -p experiments
 ```

 Currently the ELF output is placed at `target/armv7-none-eabihf/release/experiments`, or `result/experiments.elf` for Nix Flakes build.
@ -43,7 +43,7 @@ Currently the ELF output is placed at `target/armv7-none-eabihf/release/experime

 ```shell
 nix develop
-cargo xbuild --release -p experiments
+cargo build -Zbuild-std=core,compiler_builtins,alloc --release -p experiments
 cd openocd
 openocd -f zc706.cfg
 ```
@ -52,7 +52,7 @@ openocd -f zc706.cfg

 ```shell
 nix develop
-cargo xbuild --release -p experiments --no-default-features --features=target_coraz7
+cargo build -Zbuild-std=core,compiler_builtins,alloc --release -p experiments --no-default-features --features=target_coraz7
 cd openocd
 openocd -f cora-z7-10.cfg
 ```
--- a/armv7-none-eabihf.json
+++ b/armv7-none-eabihf.json
@ -4,7 +4,7 @@
  "emit-debug-gdb-scripts": false,
  "env": "",
  "executables": true,
-  "features": "+v7,+vfp3,-d32,+thumb2,-neon",
+  "features": "+v7,+vfp3,-d32,+thumb2,+neon,+a9,+armv7-a",
  "is-builtin": false,
  "linker": "rust-lld",
  "linker-flavor": "ld.lld",
--- a/experiments/src/main.rs
+++ b/experiments/src/main.rs
@ -1,9 +1,9 @@
 #![no_std]
 #![no_main]
-#![allow(incomplete_features)]
 #![feature(naked_functions)]
-#![feature(asm)]
 #![feature(inline_const)]
+#![feature(strict_provenance)]
+#![feature(raw_ref_op)]

 extern crate alloc;

@ -73,7 +73,7 @@ interrupt_handler!(IRQ, irq, __irq_stack0_start, __irq_stack1_start, {
            if id.0 == 0 {
                gic.end_interrupt(id);
                asm::exit_irq();
-                SP.write(&mut __stack1_start as *mut _ as u32);
+                SP.write((&raw mut __stack1_start).addr() as u32);
                asm::enable_irq();
                CORE1_RESTART.store(false, Ordering::Relaxed);
                notify_spin_lock();
--- a/flake.lock
+++ b/flake.lock
@ -2,11 +2,11 @@
  "nodes": {
    "nixpkgs": {
      "locked": {
-        "lastModified": 1736867362,
-        "narHash": "sha256-i/UJ5I7HoqmFMwZEH6vAvBxOrjjOJNU739lnZnhUln8=",
+        "lastModified": 1739206421,
+        "narHash": "sha256-PwQASeL2cGVmrtQYlrBur0U20Xy07uSWVnFup2PHnDs=",
        "owner": "NixOS",
        "repo": "nixpkgs",
-        "rev": "9c6b49aeac36e2ed73a8c472f1546f6d9cf1addc",
+        "rev": "44534bc021b85c8d78e465021e21f33b856e2540",
        "type": "github"
      },
      "original": {
--- a/flake.nix
+++ b/flake.nix
@ -11,7 +11,7 @@
    let
      pkgs = import nixpkgs { system = "x86_64-linux"; overlays = [ (import rust-overlay) crosspkgs-overlay ]; };
      
-      rust = pkgs.rust-bin.nightly."2021-09-01".default.override {
+      rust = pkgs.rust-bin.nightly."2024-04-06".default.override {
        extensions = [ "rust-src" ];
        targets = [ ];
      };
@ -95,10 +95,6 @@
        dontFixup = true;
      };

-      cargo-xbuild = pkgs.cargo-xbuild.overrideAttrs(oa: {
-        postPatch = "substituteInPlace src/sysroot.rs --replace 2021 2018";
-      });
-
      build-crate = name: crate: features: rustPlatform.buildRustPackage rec {
        name = "${crate}";

@ -109,16 +105,16 @@
          lockFile = ./Cargo.lock;
          outputHashes = {
            "core_io-0.1.0" = "sha256-0HINFWRiJx8pjMgUOL/CS336ih7SENSRh3Kah9LPRrw="; 
-            "fatfs-0.3.6" = "sha256-Nz9hCq/1YgSXF8ltJ5ZawV0Hc8WV44KNK0tJdVnNb4U=";
+            "fatfs-0.3.6" = "sha256-s6eApcmY0K65YQl9gu9Mg6ZXlN/+UoCcrSh6TbqpqDw=";
          };
        };

-        nativeBuildInputs = [ cargo-xbuild pkgs.llvmPackages_13.clang-unwrapped ];
+        nativeBuildInputs = [ pkgs.cargo-xbuild pkgs.llvmPackages_18.clang-unwrapped ];
+
        buildPhase = ''
-          export XARGO_RUST_SRC="${rust}/lib/rustlib/src/rust/library"
          export CARGO_HOME=$(mktemp -d cargo-home.XXX)
          pushd ${crate}
-          cargo xbuild --release --frozen \
+          cargo build -Zbuild-std=core,compiler_builtins,alloc --release --frozen \
            --no-default-features \
            --features=${features}
          popd
@ -152,7 +148,7 @@
      ) "mkdir $out\n" targets);
    in rec {
      packages.x86_64-linux = { 
-        inherit cargo-xbuild szl mkbootimage;
+        inherit szl mkbootimage;
        zc706-fsbl = fsbl { board = "zc706"; };
      } // allTargetCrates ;

@ -164,12 +160,12 @@
        name = "zynq-rs-dev-shell";
        buildInputs = [
          rust
-          cargo-xbuild
+          pkgs.cargo-xbuild
          mkbootimage

          pkgs.openocd pkgs.gdb
          pkgs.openssh pkgs.rsync
-          pkgs.llvmPackages_13.clang-unwrapped
+          pkgs.llvmPackages_18.clang-unwrapped
          (pkgs.python3.withPackages(ps: [ ps.pyftdi ]))
        ];
      };
--- a/libasync/Cargo.toml
+++ b/libasync/Cargo.toml
@ -7,7 +7,6 @@ edition = "2018"

 [dependencies]
 #futures = { version = "0.3", default-features = false }
-pin-utils = "0.1.0-alpha.4"
 embedded-hal = "0.2"
 nb = "1.0"
 libcortex_a9 = { path = "../libcortex_a9" }
--- a/libasync/src/executor.rs
+++ b/libasync/src/executor.rs
@ -1,14 +1,12 @@
+use alloc::{boxed::Box, vec::Vec};
 use core::{
-    cell::{RefCell, UnsafeCell},
+    cell::{RefCell, Cell},
    future::Future,
    mem::MaybeUninit,
-    pin::Pin,
+    pin::{pin, Pin},
    sync::atomic::{AtomicBool, Ordering},
    task::{Context, Poll, RawWaker, RawWakerVTable, Waker},
 };
-use alloc::{boxed::Box, vec::Vec};
-//use futures::future::FutureExt;
-use pin_utils::pin_mut;

 // NOTE `*const ()` is &AtomicBool
 static VTABLE: RawWakerVTable = {
@ -39,7 +37,7 @@ fn wrap_waker(ready: &AtomicBool) -> Waker {
 /// This is a singleton
 pub struct Executor {
    // Entered block_on() already?
-    in_block_on: RefCell<bool>,
+    in_block_on: Cell<bool>,

    /// Tasks reside on the heap, so that we just queue pointers. They
    /// must also be pinned in memory because our RawWaker is a pointer
@ -51,7 +49,7 @@ impl Executor {
    /// Creates a new instance of the executor
    pub fn new() -> Self {
        Self {
-            in_block_on: RefCell::new(false),
+            in_block_on: Cell::new(false),
            tasks: RefCell::new(Vec::new()),
        }
    }
@ -61,15 +59,12 @@ impl Executor {
        // below has to become more complex. It's also likely that the
        // application will only call `block_on` once on an infinite task
        // (`Future<Output = !>`)
-        {
-            let mut in_block_on = self.in_block_on.borrow_mut();
-            if *in_block_on {
-                panic!("nested `block_on`");
-            }
-            *in_block_on = true;
+        if self.in_block_on.get() {
+            panic!("nested `block_on`");
        }
+        self.in_block_on.replace(true);

-        pin_mut!(f);
+        let mut pinned_f = pin!(f);
        let ready = AtomicBool::new(true);
        let waker = wrap_waker(&ready);
        let mut backup = Vec::new();
@ -77,13 +72,10 @@ impl Executor {
            // advance the main task
            if ready.load(Ordering::Relaxed) {
                ready.store(false, Ordering::Relaxed);
-
-                // println!("run block_on");
                let mut cx = Context::from_waker(&waker);
-                if let Poll::Ready(val) = f.as_mut().poll(&mut cx) {
+                if let Poll::Ready(val) = pinned_f.as_mut().poll(&mut cx) {
                    break val;
                }
-                // println!("ran block_on");
            }

            // advance all tasks
@ -108,16 +100,12 @@ impl Executor {
                // Requeue
                self.tasks.borrow_mut().push(task);
            }
-
-            // // try to sleep; this will be a no-op if any of the previous tasks generated a SEV or an
-            // // interrupt ran (regardless of whether it generated a wake-up or not)
-            // asm::wfe();
        };
        self.in_block_on.replace(false);
        val
    }

-    pub fn spawn(&self, f: impl Future + 'static) {
+    pub fn spawn(&self, f: impl Future<Output = ()> + 'static) {
        let task = Box::pin(Task::new(f));
        self.tasks.borrow_mut().push(task);
    }
@ -129,10 +117,10 @@ pub struct Task {
 }

 impl Task {
-    fn new(f: impl Future + 'static) -> Self {
+    fn new(f: impl Future<Output = ()> + 'static) -> Self {
        Task {
            ready: AtomicBool::new(true),
-            f: Box::pin(async { f.await; }),
+            f: Box::pin(f),
        }
    }
 }
@ -142,16 +130,15 @@ impl Task {
 /// This lazily initializes the executor and allocator when first called
 pub(crate) fn current() -> &'static Executor {
    static INIT: AtomicBool = AtomicBool::new(false);
-    static mut EXECUTOR: UnsafeCell<MaybeUninit<Executor>> = UnsafeCell::new(MaybeUninit::uninit());
+    static mut EXECUTOR: MaybeUninit<Executor> = MaybeUninit::uninit();

    if INIT.load(Ordering::Relaxed) {
-        unsafe { &*(EXECUTOR.get() as *const Executor) }
+        unsafe { EXECUTOR.assume_init_ref() }
    } else {
        unsafe {
-            let executorp = EXECUTOR.get() as *mut Executor;
-            executorp.write(Executor::new());
+            let executor = EXECUTOR.write(Executor::new());
            INIT.store(true, Ordering::Relaxed);
-            &*executorp
+            &*executor
        }
    }
 }
--- a/libasync/src/task.rs
+++ b/libasync/src/task.rs
@ -17,7 +17,7 @@ pub fn block_on<T>(f: impl Future<Output = T>) -> T {
 /// Spawns a task onto the executor
 ///
 /// The spawned task will not make any progress until `block_on` is called.
-pub fn spawn(f: impl Future + 'static) {
+pub fn spawn(f: impl Future<Output = ()> + 'static) {
    executor::current().spawn(f)
 }

--- a/libboard_zynq/src/i2c/eeprom.rs
+++ b/libboard_zynq/src/i2c/eeprom.rs
@ -1,4 +1,4 @@
-use super::I2c;
+use super::{I2c, Error};
 use crate::time::Milliseconds;
 use embedded_hal::timer::CountDown;

@ -35,25 +35,25 @@ impl<'a> EEPROM<'a> {
    }

    #[cfg(feature = "target_zc706")]
-    fn select(&mut self) -> Result<(), &'static str> {
+    fn select(&mut self) -> Result<(), Error> {
        self.i2c.pca954x_select(0b1110100, Some(self.port))?;
        Ok(())
    }

    #[cfg(feature = "target_kasli_soc")]
-    fn select(&mut self) -> Result<(), &'static str> {
+    fn select(&mut self) -> Result<(), Error> {
        // tca9548 is compatible with pca9548
        self.i2c.pca954x_select(0b1110001, Some(self.port))?;
        Ok(())
    }

    #[cfg(feature = "target_ebaz4205")]
-    fn select(&mut self) -> Result<(), &'static str> {
+    fn select(&mut self) -> Result<(), Error> {
        Ok(())
    }

    /// Random read
-    pub fn read<'r>(&mut self, addr: u8, buf: &'r mut [u8]) -> Result<(), &'static str> {
+    pub fn read<'r>(&mut self, addr: u8, buf: &'r mut [u8]) -> Result<(), Error> {
        self.select()?;

        self.i2c.start()?;
@ -78,7 +78,7 @@ impl<'a> EEPROM<'a> {
    /// (i.e. `addr+buf.len()` < `addr/self.page_size+1`); otherwise, a roll-oever occurs, 
    /// where bytes beyond the page end. This smart function takes care of the scenario to avoid
    /// any roll-over when writing ambiguous memory regions.
-    pub fn write(&mut self, addr: u8, buf: &[u8]) -> Result<(), &'static str> {
+    pub fn write(&mut self, addr: u8, buf: &[u8]) -> Result<(), Error> {
        self.select()?;

        let buf_len = buf.len();
@ -103,26 +103,28 @@ impl<'a> EEPROM<'a> {
    }

    /// Poll
-    pub fn poll(&mut self, timeout_ms: u64) -> Result<(), &'static str> {
+    pub fn poll(&mut self, timeout_ms: u64) -> Result<(), Error> {
        self.select()?;

        self.count_down.start(Milliseconds(timeout_ms));
        loop {
            self.i2c.start()?;
-            let ack = self.i2c.write(self.address << 1)?;
+            let res = self.i2c.write(self.address << 1);
            self.i2c.stop()?;
-            if ack {
-                break
-            };
+            match res {
+                Ok(()) => break,
+                Err(Error::Nack) => (),
+                Err(e) => return Err(e)
+            }
            if !self.count_down.waiting() {
-                return Err("I2C polling timeout")
+                return Err(Error::PollingTimeout)
            }
        }

        Ok(())
    }

-    pub fn read_eui48<'r>(&mut self) -> Result<[u8; 6], &'static str> {
+    pub fn read_eui48<'r>(&mut self) -> Result<[u8; 6], Error> {
        let mut buffer = [0u8; 6];
        self.read(0xFA, &mut buffer)?;
        Ok(buffer)
--- a/libboard_zynq/src/i2c/mod.rs
+++ b/libboard_zynq/src/i2c/mod.rs
@ -11,6 +11,7 @@ use libregister::{RegisterR, RegisterRW};
 use libregister::RegisterW;
 #[cfg(feature = "target_kasli_soc")]
 use log::info;
+use log::error;

 pub enum I2cMultiplexer {
    PCA9548 = 0,
@ -18,6 +19,31 @@ pub enum I2cMultiplexer {
    PCA9547 = 1,
 }

+#[derive(Debug)]
+pub enum Error {
+    Nack,
+    SCLLow,
+    SDALow,
+    ArbitrationLost,
+    UnknownSwitch,
+    PollingTimeout,
+    OtherError,
+}
+
+impl From<Error> for &str {
+    fn from(err: Error) -> &'static str {
+        match err {
+            Error::Nack => "I2C write was not ACKed",
+            Error::SCLLow => "SCL stuck low",
+            Error::SDALow => "SDA stuck low",
+            Error::ArbitrationLost => "SDA arbitration lost",
+            Error::UnknownSwitch => "Unknown response for PCA954X autodetect",
+            Error::PollingTimeout => "I2C polling timeout",
+            Error::OtherError => "other error",
+        }
+    }
+}
+
 pub struct I2c {
    regs: regs::RegisterBlock,
    count_down: super::timer::global::CountDown<Microseconds>,
@ -148,7 +174,7 @@ impl I2c {
    }

    #[cfg(feature = "target_kasli_soc")]
-    fn pca_autodetect(&mut self) -> Result<I2cMultiplexer, &'static str> {
+    fn pca_autodetect(&mut self) -> Result<I2cMultiplexer, Error> {
        // start with resetting the PCA954X
        // SDA must be clear (before start)
        // reset time is 500ns, unit_delay (100us) to account for propagation
@ -161,21 +187,26 @@ impl I2c {

        self.start()?;
        // read the config register
-        if !self.write(pca954x_read_addr)? {
-            return Err("PCA954X failed to ack read address");
-        }
+        self.write(pca954x_read_addr).map_err(|err| {
+                match err {
+                    Error::Nack => error!("PCA954X failed to ack read address"),
+                    _ => ()
+                }
+                err
+            }
+        )?;
        let config = self.read(false)?;

        let pca = match config {
            0x00 => { info!("PCA9548 detected"); I2cMultiplexer::PCA9548 },
            0x08 => { info!("PCA9547 detected"); I2cMultiplexer::PCA9547 },
-            _ => { return Err("Unknown response for PCA954X autodetect")},
+            _ => { return Err(Error::UnknownSwitch)},
        };
        self.stop()?;
        Ok(pca)
    }

-    pub fn init(&mut self) -> Result<(), &'static str> {
+    pub fn init(&mut self) -> Result<(), Error> {
        self.scl_oe(false);
        self.sda_oe(false);
        self.scl_o(false);
@ -195,10 +226,10 @@ impl I2c {
        }

        if !self.sda_i() {
-            return Err("SDA is stuck low and doesn't get unstuck");
+            return Err(Error::SDALow);
        }
        if !self.scl_i() {
-            return Err("SCL is stuck low");
+            return Err(Error::SCLLow);
        }
        // postcondition: SCL and SDA high
        
@ -211,13 +242,13 @@ impl I2c {
        Ok(())
    }

-    pub fn start(&mut self) -> Result<(), &'static str> {
+    pub fn start(&mut self) -> Result<(), Error> {
        // precondition: SCL and SDA high
        if !self.scl_i() {
-            return Err("SCL is stuck low");
+            return Err(Error::SCLLow);
        }
        if !self.sda_i() {
-            return Err("SDA arbitration lost");
+            return Err(Error::ArbitrationLost);
        }
        self.sda_oe(true);
        self.unit_delay();
@ -227,7 +258,7 @@ impl I2c {
        Ok(())
    }

-    pub fn restart(&mut self) -> Result<(), &'static str> {
+    pub fn restart(&mut self) -> Result<(), Error> {
        // precondition SCL and SDA low
        self.sda_oe(false);
        self.unit_delay();
@ -238,7 +269,7 @@ impl I2c {
        Ok(())
    }

-    pub fn stop(&mut self) -> Result<(), &'static str> {
+    pub fn stop(&mut self) -> Result<(), Error> {
        // precondition: SCL and SDA low
        self.unit_delay();
        self.scl_oe(false);
@ -246,13 +277,13 @@ impl I2c {
        self.sda_oe(false);
        self.unit_delay();
        if !self.sda_i() {
-            return Err("SDA arbitration lost");
+            return Err(Error::ArbitrationLost);
        }
        // postcondition: SCL and SDA high
        Ok(())
    }

-    pub fn write(&mut self, data: u8) -> Result<bool, &'static str> {
+    pub fn write(&mut self, data: u8) -> Result<(), Error> {
        // precondition: SCL and SDA low
        // MSB first
        for bit in (0..8).rev() {
@ -274,10 +305,10 @@ impl I2c {
        self.sda_oe(true);
        // postcondition: SCL and SDA low

-        Ok(ack)
+        if ack { Ok(()) } else { Err(Error::Nack) }
    }

-    pub fn read(&mut self, ack: bool) -> Result<u8, &'static str> {
+    pub fn read(&mut self, ack: bool) -> Result<u8, Error> {
        // precondition: SCL and SDA low
        self.sda_oe(false);

@ -303,7 +334,7 @@ impl I2c {
        Ok(data)
    }

-    pub fn pca954x_select(&mut self, address: u8, channel: Option<u8>) -> Result<(), &'static str> {
+    pub fn pca954x_select(&mut self, address: u8, channel: Option<u8>) -> Result<(), Error> {
        self.start()?;
        // PCA9547 supports only one channel at a time
        // for compatibility, PCA9548 is treated as such too
@ -324,13 +355,16 @@ impl I2c {
            }
        };

-        if !self.write(address << 1)? {
-            return Err("PCA954X failed to ack write address")
-        }
-        if !self.write(setting)? {
-            return Err("PCA954X failed to ack control word")
-        }
-        self.stop()?;
-        Ok(())
+        let write_res = self.write(address << 1).or_else( |err| {
+                error!("PCA954X write address fail: {:?}", err);
+                Err(err)
+            }).and_then(|_| self.write(setting).or_else(|err| {
+                error!("PCA954X control word fail: {:?}", err);
+                Err(err)
+            })
+        );
+        let stop_res = self.stop();
+
+        write_res.and(stop_res)
    }
 }
--- a/libboard_zynq/src/sdio/mod.rs
+++ b/libboard_zynq/src/sdio/mod.rs
@ -9,7 +9,6 @@ use super::time::Milliseconds;
 use embedded_hal::timer::CountDown;
 use libregister::{RegisterR, RegisterRW, RegisterW};
 use log::{trace, debug};
-use nb;

 /// Basic SDIO Struct with common low-level functions.
 pub struct Sdio {
--- a/libconfig/Cargo.toml
+++ b/libconfig/Cargo.toml
@ -15,7 +15,7 @@ features = ["collections"]

 [dependencies.fatfs]
 git = "https://git.m-labs.hk/M-Labs/rust-fatfs.git"
-rev = "4b5e420084"
+rev = "6819267d08"
 default-features = false
 features = ["core_io"]

--- a/libconfig/src/sd_reader.rs
+++ b/libconfig/src/sd_reader.rs
@ -1,5 +1,4 @@
 use core_io::{BufRead, Error, ErrorKind, Read, Result as IoResult, Seek, SeekFrom, Write};
-use fatfs;
 use libboard_zynq::sdio::{sd_card::SdCard, CmdTransferError};
 use log::debug;
 use alloc::vec::Vec;
--- a/libcortex_a9/src/cache.rs
+++ b/libcortex_a9/src/cache.rs
@ -137,15 +137,15 @@ fn cache_line_addrs(first_addr: usize, beyond_addr: usize) -> impl Iterator<Item
    (first_addr..beyond_addr).step_by(CACHE_LINE)
 }

-fn object_cache_line_addrs<T>(object: &T) -> impl Iterator<Item = usize> {
-    let first_addr = object as *const _ as usize;
-    let beyond_addr = (object as *const _ as usize) + core::mem::size_of_val(object);
+fn object_cache_line_addrs<T>(object: *const T) -> impl Iterator<Item = usize> {
+    let first_addr = object.addr();
+    let beyond_addr = object.addr() + core::mem::size_of::<T>(); 
    cache_line_addrs(first_addr, beyond_addr)
 }

 fn slice_cache_line_addrs<T>(slice: &[T]) -> impl Iterator<Item = usize> {
-    let first_addr = &slice[0] as *const _ as usize;
-    let beyond_addr = (&slice[slice.len() - 1] as *const _ as usize) +
+    let first_addr = (&raw const slice[0]).addr();
+    let beyond_addr = (&raw const slice[slice.len() - 1]).addr() +
        core::mem::size_of_val(&slice[slice.len() - 1]);
    cache_line_addrs(first_addr, beyond_addr)
 }
@ -162,7 +162,7 @@ pub fn dccimvac(addr: usize) {
 }

 /// Data cache clean and invalidate for an object.
-pub fn dcci<T>(object: &T) {
+pub fn dcci<T>(object: *const T) {
    // ref: L2C310 TRM 3.3.10
    dmb();
    for addr in object_cache_line_addrs(object) {
@ -203,7 +203,7 @@ pub fn dccmvac(addr: usize) {
    }
 }
 /// Data cache clean for an object.
-pub fn dcc<T>(object: &T) {
+pub fn dcc<T>(object: *const T) {
    dmb();
    for addr in object_cache_line_addrs(object) {
        dccmvac(addr);
--- a/libcortex_a9/src/lib.rs
+++ b/libcortex_a9/src/lib.rs
@ -1,10 +1,8 @@
 #![no_std]
 #![feature(never_type)]
-#![feature(global_asm)]
-#![feature(asm)]
-#![allow(incomplete_features)]
 #![feature(inline_const)]
-#![feature(const_fn_trait_bound)]
+#![feature(strict_provenance)]
+#![feature(raw_ref_op)]

 extern crate alloc;

--- a/libcortex_a9/src/mmu.rs
+++ b/libcortex_a9/src/mmu.rs
@ -1,3 +1,4 @@
+use core::cell::UnsafeCell;
 use bit_field::BitField;
 use super::{regs::*, asm::*, cache::*};
 use libregister::RegisterW;
@ -124,9 +125,9 @@ impl L1Entry {
 }

 const L1_TABLE_SIZE: usize = 4096;
-static mut L1_TABLE: L1Table = L1Table {
+static mut L1_TABLE: UnsafeCell<L1Table> = UnsafeCell::new(L1Table {
    table: [L1Entry(0); L1_TABLE_SIZE]
-};
+});

 #[repr(C, align(16384))]
 pub struct L1Table {
@ -135,9 +136,7 @@ pub struct L1Table {

 impl L1Table {
    pub fn get() -> &'static mut Self {
-        unsafe {
-            &mut L1_TABLE
-        }
+        unsafe { L1_TABLE.get_mut() }
    }

    pub fn setup_flat_layout(&mut self) -> &Self {
--- a/libcortex_a9/src/sync_channel.rs
+++ b/libcortex_a9/src/sync_channel.rs
@ -37,7 +37,7 @@ impl<'a, T> Sender<'a, T> where T: Clone {
            notify_spin_lock();
            if !prev.is_null() {
                unsafe {
-                    Box::from_raw(prev);
+                    let _ = Box::from_raw(prev);
                }
            }
            Ok(())
@ -91,7 +91,7 @@ impl<'a, T> Sender<'a, T> where T: Clone {
        for v in self.list.iter() {
            let original = v.swap(core::ptr::null_mut(), Ordering::Relaxed);
            if !original.is_null() {
-                Box::from_raw(original);
+                let _ = Box::from_raw(original);
            }
        }
    }
@ -177,10 +177,7 @@ macro_rules! sync_channel {
        {
            use core::sync::atomic::{AtomicUsize, AtomicPtr};
            use $crate::sync_channel::{Sender, Receiver};
-            const fn new_atomic() -> AtomicPtr<$t> {
-                AtomicPtr::new(core::ptr::null_mut())
-            }
-            static LIST: [AtomicPtr<$t>; $cap + 1] = [const { new_atomic() }; $cap + 1];
+            static LIST: [AtomicPtr<$t>; $cap + 1] = [const { AtomicPtr::new(core::ptr::null_mut()) }; $cap + 1];
            static WRITE: AtomicUsize = AtomicUsize::new(0);
            static READ: AtomicUsize = AtomicUsize::new(0);
            (Sender::new(&LIST, &WRITE, &READ), Receiver::new(&LIST, &WRITE, &READ))
--- a/libsupport_zynq/Cargo.toml
+++ b/libsupport_zynq/Cargo.toml
@ -20,7 +20,6 @@ default = ["panic_handler", "dummy_irq_handler", "dummy_fiq_handler"]

 [dependencies]
 r0 = "1"
-compiler_builtins = "=0.1.49"
 linked_list_allocator = { version = "0.8", default-features = false, features = ["const_mut_refs"] }
 libregister = { path = "../libregister" }
 libcortex_a9 = { path = "../libcortex_a9" }
@ -28,3 +27,33 @@ libboard_zynq = { path = "../libboard_zynq" }

 [build-dependencies]
 cc = { version = "1.0" }
+
+# HACK: insanity required to make build-std work with nix
+[dev-dependencies]
+compiler_builtins = "=0.1.108"
+hashbrown = "=0.14.3"
+libc = "=0.2.153"
+rustc-demangle = "=0.1.23"
+object = "=0.32.2"
+byteorder = "=1.5.0"
+dlmalloc = "=0.2.6"
+addr2line = "=0.21.0"
+miniz_oxide = "=0.7.2"
+hermit-abi = "=0.3.9"
+r-efi = "=4.3.0"
+r-efi-alloc = "=1.0.0"
+wasi = "=0.11.0"
+fortanix-sgx-abi = "=0.5.0"
+getopts = "=0.2.21"
+allocator-api2 = "=0.2.16"
+unwinding = "=0.2.1"
+memchr = "=2.5.0"
+unicode-width = "=0.1.11"
+windows-targets = "=0.52.4"
+windows_aarch64_gnullvm = "=0.52.4"
+windows_aarch64_msvc = "=0.52.4"
+windows_i686_gnu = "=0.52.4"
+windows_i686_msvc = "=0.52.4"
+windows_x86_64_gnu = "=0.52.4"
+windows_x86_64_msvc = "=0.52.4"
+windows_x86_64_gnullvm = "=0.52.4"
--- a/libsupport_zynq/src/boot.rs
+++ b/libsupport_zynq/src/boot.rs
@ -43,10 +43,11 @@ unsafe extern "C" fn boot_core0() -> ! {
    let mpcore = mpcore::RegisterBlock::mpcore();
    mpcore.scu_invalidate.invalidate_all_cores();

-    zero_bss(&mut __bss_start, &mut __bss_end);
+    zero_bss(&raw mut __bss_start, &raw mut __bss_end);

    let mmu_table = mmu::L1Table::get()
        .setup_flat_layout();
+    cache::dcc(mmu_table);
    mmu::with_mmu(mmu_table, || {
        mpcore.scu_control.start();
        ACTLR.enable_smp();
@ -66,6 +67,7 @@ unsafe extern "C" fn boot_core0() -> ! {
 unsafe extern "C" fn boot_core1() -> ! {
    l1_cache_init();

+    enable_fpu();
    let mpcore = mpcore::RegisterBlock::mpcore();
    mpcore.scu_invalidate.invalidate_core1();

@ -132,7 +134,7 @@ impl Core1 {
            CORE1_ENABLED.set(true);
        }
        // Flush cache-line
-        cache::dcc(unsafe { &CORE1_ENABLED });
+        cache::dcc(unsafe { &raw const CORE1_ENABLED });
        if sdram {
            cache::dccmvac(0);
            asm::dsb();
@ -153,7 +155,7 @@ impl Core1 {
    pub fn disable(&self) {
        unsafe {
            CORE1_ENABLED.set(false);
-            cache::dccmvac(&CORE1_ENABLED  as *const _ as usize);
+            cache::dccmvac((&raw const CORE1_ENABLED).addr());
            asm::dsb();
        }
        self.restart();
--- a/libsupport_zynq/src/lib.rs
+++ b/libsupport_zynq/src/lib.rs
@ -3,11 +3,10 @@
 #![feature(alloc_error_handler)]
 #![feature(panic_info_message)]
 #![feature(naked_functions)]
-#![feature(global_asm)]
-#![feature(asm)]
+#![feature(strict_provenance)]
+#![feature(raw_ref_op)]

 pub extern crate alloc;
-pub extern crate compiler_builtins;

 pub mod boot;
 pub mod exception_vectors;
--- a/szl/src/main.rs
+++ b/szl/src/main.rs
@ -1,6 +1,9 @@
 #![no_std]
 #![no_main]

+#![feature(strict_provenance)]
+#![feature(raw_ref_op)]
+
 extern crate alloc;
 extern crate log;

@ -116,18 +119,18 @@ pub fn main_core0() {

    unsafe {
        let max_len =
-            &__runtime_end as *const usize as usize - &__runtime_start as *const usize as usize;
+            (&raw const __runtime_end).addr() - (&raw const __runtime_start).addr();
        match slcr::RegisterBlock::unlocked(|slcr| slcr.boot_mode.read().boot_mode_pins()) {
            slcr::BootModePins::Jtag => netboot::netboot(
                &mut bootgen_file,
                config,
-                &mut __runtime_start as *mut usize as *mut u8,
+                (&raw mut __runtime_start).cast(),
                max_len,
            ),
            slcr::BootModePins::SdCard => {
                if boot_sd(
                    &mut bootgen_file,
-                    &mut __runtime_start as *mut usize as *mut u8,
+                    (&raw mut __runtime_start).cast(),
                    max_len,
                )
                .is_err()
@ -137,7 +140,7 @@ pub fn main_core0() {
                    netboot::netboot(
                        &mut bootgen_file,
                        config,
-                        &mut __runtime_start as *mut usize as *mut u8,
+                        (&raw mut __runtime_start).cast(),
                        max_len,
                    )
                }
@ -148,7 +151,7 @@ pub fn main_core0() {
                netboot::netboot(
                    &mut bootgen_file,
                    config,
-                    &mut __runtime_start as *mut usize as *mut u8,
+                    (&raw mut __runtime_start).cast(),
                    max_len,
                )
            }
Author	SHA1	Message	Date
Simon Renblad	b3cfe37bf6	update readme for build-std	2025-04-11 11:17:21 +08:00
Simon Renblad	652a9c5657	update cargo lockfile	2025-04-11 11:17:21 +08:00
Simon Renblad	ebbc5291f9	update fatfs dependency	2025-04-11 11:17:21 +08:00
Simon Renblad	65bc32ab8e	move to build-std	2025-04-11 11:17:21 +08:00
mwojcik	c98c30c656	i2c: stop the bus after nack in pca switch	2025-03-28 14:54:42 +08:00
mwojcik	671cfc894c	i2c: use enum errors	2025-03-19 15:13:29 +08:00
Simon Renblad	905b97431d	executor: replace soft-deprecated pin_utils	2025-03-12 18:03:27 +08:00
Simon Renblad	e4e45274ff	silence static mut ref warns for CORE1_ENABLED	2025-03-12 17:02:41 +08:00
Simon Renblad	8e827fc6ee	cache: make dcci, dcc take raw const ptr	2025-03-12 17:02:41 +08:00
Simon Renblad	d3b4173edc	silence static mut ref warns for L1_TABLE	2025-03-12 17:02:41 +08:00
Simon Renblad	f5aca2f0df	remove unnecessary imports	2025-03-12 17:02:41 +08:00
Simon Renblad	8bd182b74e	sync_channel: fix Box::from_raw warn	2025-03-12 17:02:41 +08:00
Simon Renblad	16092e66ce	replace ref->ptr casts with raw ref ops	2025-03-12 17:02:41 +08:00
Simon Renblad	547a91c5dd	update cargo lockfile	2025-03-12 17:02:41 +08:00
Simon Renblad	20730a0c6e	bump llvm to 18	2025-03-12 17:02:41 +08:00
Simon Renblad	d6f2e51e10	bump compiler_builtins to 0.1.108	2025-03-12 17:02:41 +08:00
Simon Renblad	07c56258e8	bump rust vers	2025-03-12 17:02:41 +08:00
Simon Renblad	d92a40172b	clean cache for L1Table after setup	2025-03-06 16:22:33 +08:00
Simon Renblad	a92aab6c9a	remove unnecessary UnsafeCell from EXECUTOR	2025-02-27 15:32:05 +08:00
Simon Renblad	4364521a76	executor: revert to cells	2025-02-25 11:20:05 +08:00
Simon Renblad	4f90c61442	up liballoc to edition 2021	2025-02-17 09:35:31 +08:00
Sebastien Bourdeauducq	1c3912e34e	flake: update dependencies	2025-02-13 17:04:57 +08:00
Simon Renblad	b01db024f2	update cargo lockfile	2025-02-13 16:59:05 +08:00
Simon Renblad	86af810f02	fix inline_const	2025-02-13 16:59:05 +08:00
Simon Renblad	7412291b16	remove stabilized feature flags	2025-02-13 16:59:05 +08:00
Simon Renblad	ac33c09578	remove allow incomplete_feature	2025-02-13 16:59:05 +08:00
Simon Renblad	9e41aed178	silence target-feature warns	2025-02-13 16:59:05 +08:00
Simon Renblad	ce57ae40de	bump llvm	2025-02-13 10:57:25 +08:00
Simon Renblad	aecce03dc8	bump compiler_builtins	2025-02-12 10:36:08 +08:00
Simon Renblad	74436691ec	bump rustc	2025-02-12 10:36:08 +08:00
Simon Renblad	0ed235475a	enable vfp and NEON in boot_core1	2025-02-11 20:15:05 +08:00
Simon Renblad	c6f6bd292d	libasync: clean up executor	2025-02-11 15:25:49 +08:00