fix interrupt handler

Cargo.toml

@@ -9,6 +9,7 @@ members = [
   "experiments",
   "szl",
 ]
+resolver = "2"
 
 [profile.release]
 panic = "abort"

experiments/src/main.rs

@@ -6,6 +6,7 @@ extern crate alloc;
 
 use alloc::collections::BTreeMap;
 use core::arch::asm;
+use core::ptr::addr_of_mut;
 use libasync::{
     delay,
     smoltcp::{Sockets, TcpStream},
@@ -70,7 +71,7 @@ interrupt_handler!(IRQ, irq, __irq_stack0_start, __irq_stack1_start, {
             if id.0 == 0 {
                 gic.end_interrupt(id);
                 asm::exit_irq();
-                SP.write(&mut __stack1_start as *mut _ as u32);
+                SP.write(addr_of_mut!(__stack1_start) as *mut _ as u32);
                 asm::enable_irq();
                 CORE1_RESTART.store(false, Ordering::Relaxed);
                 notify_spin_lock();

libcortex_a9/src/lib.rs

@@ -51,7 +51,7 @@ macro_rules! interrupt_handler {
         #[link_section = ".text.boot"]
         #[no_mangle]
         #[naked]
-        pub unsafe extern "C" fn $name() -> ! {
+        pub unsafe extern "C" fn $name() {
             asm!(
                 // setup SP, depending on CPU 0 or 1
                 // and preserve registers