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aab82f6843
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zynq::flash: enable big endian mode
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2019-12-10 02:45:05 +01:00 |
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f3676c945a
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zynq::flash: flush after instruction
|
2019-12-07 02:48:55 +01:00 |
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1e465250f5
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zynq::flash: enable/disable spi for every transfer
|
2019-12-07 02:11:50 +01:00 |
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|
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e37659e4b3
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zynq::flash: refactor
|
2019-12-05 01:18:52 +01:00 |
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45cc271735
|
zynq::flash: fix + refactor
|
2019-12-05 00:05:34 +01:00 |
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cfaa1213e2
|
zynq::flash: add more initialization
|
2019-12-03 02:41:49 +01:00 |
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7107244a6e
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zynq::flash: start implementing Manual mode
|
2019-11-30 02:48:39 +01:00 |
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dd3ad3be67
|
zynq::flash: implement stopping LinearAddressing mode
|
2019-11-29 23:48:08 +01:00 |
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|
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a8a7f11990
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zynq::flash: configure quad i/o fast read mode
|
2019-11-29 23:37:54 +01:00 |
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78caca1f04
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zynq::flash: setup additional signals
|
2019-11-28 03:22:26 +01:00 |
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5642feb824
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zynq::flash: add missing config bits to enable addressing mode
|
2019-11-28 03:02:51 +01:00 |
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a199a5dc7d
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zynq::flash: add more setup
|
2019-11-23 01:59:24 +01:00 |
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3180f1c3f7
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zynq::flash: begin driver implementation
|
2019-11-21 00:14:09 +01:00 |
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