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zynq-rs
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zynq::eth: enable checksum offload

This commit is contained in:
Astro 2019-11-11 01:39:07 +01:00
parent 3eb7fce572
commit 92c274348f
1 changed files with 13 additions and 1 deletions
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14
src/zynq/eth/mod.rs
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@ -337,8 +337,17 @@ impl<'r, 'rx, 'tx: 'a, 'a> smoltcp::phy::Device<'a> for &mut Eth<'r, rx::DescLis
type TxToken = tx::Token<'a, 'tx>; type TxToken = tx::Token<'a, 'tx>;
fn capabilities(&self) -> smoltcp::phy::DeviceCapabilities { fn capabilities(&self) -> smoltcp::phy::DeviceCapabilities {
let mut caps = smoltcp::phy::DeviceCapabilities::default(); use smoltcp::phy::{DeviceCapabilities, ChecksumCapabilities, Checksum};
let mut checksum_caps = ChecksumCapabilities::default();
checksum_caps.ipv4 = Checksum::Both;
checksum_caps.tcp = Checksum::Both;
checksum_caps.udp = Checksum::Both;
let mut caps = DeviceCapabilities::default();
caps.max_transmission_unit = MTU; caps.max_transmission_unit = MTU;
caps.checksum = checksum_caps;
caps caps
} }
@ -457,6 +466,8 @@ impl<'r> EthInner<'r> {
.copy_all(true) .copy_all(true)
// Remove 4-byte Frame CheckSum // Remove 4-byte Frame CheckSum
.fcs_remove(true) .fcs_remove(true)
// RX checksum offload
.rx_chksum_offld_en(true)
// One of the slower speeds // One of the slower speeds
.mdc_clk_div((mdc_clk_div >> 4).min(0b111) as u8) .mdc_clk_div((mdc_clk_div >> 4).min(0b111) as u8)
); );
@ -487,6 +498,7 @@ impl<'r> EthInner<'r> {
.rx_pktbuf_memsz_sel(0x3) .rx_pktbuf_memsz_sel(0x3)
// 4 KB // 4 KB
.tx_pktbuf_memsz_sel(true) .tx_pktbuf_memsz_sel(true)
// TX checksum offload
.csum_gen_offload_en(true) .csum_gen_offload_en(true)
// Little-endian // Little-endian
.ahb_endian_swp_mgmt_en(false) .ahb_endian_swp_mgmt_en(false)