srenblad
/
zynq-rs
forked from M-Labs/zynq-rs
1
0
Fork 0
Code Pull Requests Activity

kasli-soc: internal JTAG

This commit is contained in:
Sebastien Bourdeauducq 2021-05-28 18:44:07 +08:00
parent 666c077cef
commit 823ec374ba
1 changed files with 11 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
openocd/kasli-soc.cfg
View File

@ -1,6 +1,10 @@
# Using external JTAG for now. interface ftdi
ftdi_device_desc "Quad RS232-HS"
source ./digilent-hs2.cfg ftdi_vid_pid 0x0403 0x6011
ftdi_channel 0
# some GPIOs need to be set, otherwise the FTDI chip craps out for some reason.
ftdi_layout_init 0x0098 0x008b
transport select jtag
adapter_khz 1000 adapter_khz 1000
set PL_TAPID 0x1372c093 set PL_TAPID 0x1372c093
@ -8,7 +12,10 @@ set SMP 1
source ./zynq-7000.cfg source ./zynq-7000.cfg
reset_config none ftdi_layout_signal nSRST -data 0x0002
reset_config srst_only srst_push_pull
adapter_nsrst_assert_width 250
adapter_nsrst_delay 400
set XC7_JSHUTDOWN 0x0d set XC7_JSHUTDOWN 0x0d
set XC7_JPROGRAM 0x0b set XC7_JPROGRAM 0x0b