srenblad/zynq-rs
1
0
Fork 0
forked from M-Labs/zynq-rs
Code Pull Requests Activity

szl: move enable l2c to artiq-zynq

Browse Source
This commit is contained in:
pca006132 2021-01-26 11:19:33 +08:00
parent b50540915d
commit 6e6612bc3e
1 changed files with 0 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
szl/src/main.rs
View File

@ -20,7 +20,6 @@ use libconfig::{bootgen, sd_reader, Config};
use libcortex_a9::{
asm::{dsb, isb},
cache::{bpiall, dcciall, iciallu},
l2c::enable_l2_cache,
};
use libregister::RegisterR;
use libsupport_zynq::ram;
@ -80,7 +79,6 @@ pub fn main_core0() {
"#
);
info!("Simple Zynq Loader starting...");
enable_l2_cache();
const CPU_FREQ: u32 = 800_000_000;