forked from M-Labs/zynq-rs
openocd: fix Kasli-SoC nSRST
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@ -12,8 +12,8 @@ set SMP 1
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source ./zynq-7000.cfg
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ftdi_layout_signal nSRST -data 0x0002
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reset_config srst_only srst_push_pull
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ftdi_layout_signal nSRST -oe 0x0004
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reset_config srst_only srst_open_drain
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adapter_nsrst_assert_width 250
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adapter_nsrst_delay 400
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@ -38,7 +38,7 @@ pld device virtex2 zynq.tap 1
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init
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xc7_program zynq.tap
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halt
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reset halt
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# Disable MMU
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targets $_TARGETNAME_1
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