forked from M-Labs/zynq-rs
experiments: setup IoPll to 1 GHz to fix eth
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@ -44,8 +44,11 @@ pub fn main_core0() {
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println!("Setup clock sources...");
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println!("Setup clock sources...");
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ArmPll::setup(2 * CPU_FREQ);
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ArmPll::setup(2 * CPU_FREQ);
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Clocks::set_cpu_freq(CPU_FREQ);
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Clocks::set_cpu_freq(CPU_FREQ);
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IoPll::setup(700_000_000);
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#[cfg(feature = "target_zc706")]
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libboard_zynq::stdio::drop_uart();
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{
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IoPll::setup(1_000_000_000);
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libboard_zynq::stdio::drop_uart();
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}
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println!("PLLs set up");
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println!("PLLs set up");
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let clocks = zynq::clocks::Clocks::get();
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let clocks = zynq::clocks::Clocks::get();
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println!("CPU Clocks: {}/{}/{}/{}", clocks.cpu_6x4x(), clocks.cpu_3x2x(), clocks.cpu_2x(), clocks.cpu_1x());
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println!("CPU Clocks: {}/{}/{}/{}", clocks.cpu_6x4x(), clocks.cpu_3x2x(), clocks.cpu_2x(), clocks.cpu_1x());
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