forked from M-Labs/zynq-rs
libcortex_a9: add interrupt exit support for interrupt_handler macro (#107)
Co-authored-by: morgan <mc@m-labs.hk> Co-committed-by: morgan <mc@m-labs.hk>
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be672ab662
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24c804e6f0
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@ -56,19 +56,29 @@ extern "C" {
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static CORE1_RESTART: AtomicBool = AtomicBool::new(false);
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static CORE1_RESTART: AtomicBool = AtomicBool::new(false);
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interrupt_handler!(IRQ, irq, __irq_stack0_start, __irq_stack1_start, {
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interrupt_handler!(IRQ, irq, __irq_stack0_start, __irq_stack1_start, {
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if MPIDR.read().cpu_id() == 1{
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let mpcore = mpcore::RegisterBlock::mpcore();
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let mpcore = mpcore::RegisterBlock::mpcore();
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let mut gic = gic::InterruptController::gic(mpcore);
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let mut gic = gic::InterruptController::gic(mpcore);
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let id = gic.get_interrupt_id();
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let id = gic.get_interrupt_id();
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match MPIDR.read().cpu_id(){
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if id.0 == 0 {
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0 => {
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gic.end_interrupt(id);
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if id.0 == 0 {
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asm::exit_irq();
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println!("Interrupting core0...");
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SP.write(&mut __stack1_start as *mut _ as u32);
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gic.end_interrupt(id);
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asm::enable_irq();
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return;
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CORE1_RESTART.store(false, Ordering::Relaxed);
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}
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notify_spin_lock();
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},
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main_core1();
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1 => {
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}
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if id.0 == 0 {
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gic.end_interrupt(id);
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asm::exit_irq();
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SP.write(&mut __stack1_start as *mut _ as u32);
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asm::enable_irq();
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CORE1_RESTART.store(false, Ordering::Relaxed);
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notify_spin_lock();
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main_core1();
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}
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},
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_ => {}
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}
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}
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stdio::drop_uart();
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stdio::drop_uart();
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println!("IRQ");
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println!("IRQ");
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@ -134,6 +144,10 @@ pub fn main_core0() {
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ddr.memtest();
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ddr.memtest();
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ram::init_alloc_ddr(&mut ddr);
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ram::init_alloc_ddr(&mut ddr);
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info!("Send software interrupt to core0");
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interrupt_controller.send_sgi(gic::InterruptId(0), gic::CPUCore::Core0.into());
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info!("Core0 returned from interrupt");
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boot::Core1::start(false);
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boot::Core1::start(false);
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let core1_req = unsafe { &mut CORE1_REQ.0 };
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let core1_req = unsafe { &mut CORE1_REQ.0 };
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@ -36,7 +36,9 @@ pub fn notify_spin_lock() {
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}
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}
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#[macro_export]
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#[macro_export]
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/// Interrupt handler, which setup the stack and jump to actual interrupt handler.
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/// Interrupt handler, which setup the stack and preserve registers before jumping to actual interrupt handler.
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/// Registers r0-r12, PC, SP and CPSR are restored after the actual handler.
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///
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/// - `name` is the name of the interrupt, should be the same as the one defined in vector table.
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/// - `name` is the name of the interrupt, should be the same as the one defined in vector table.
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/// - `name2` is the name for the actual handler, should be different from name.
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/// - `name2` is the name for the actual handler, should be different from name.
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/// - `stack0` is the stack for the interrupt handler when called from core0.
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/// - `stack0` is the stack for the interrupt handler when called from core0.
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@ -44,8 +46,7 @@ pub fn notify_spin_lock() {
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/// - `body` is the body of the actual interrupt handler, should be a normal unsafe rust function
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/// - `body` is the body of the actual interrupt handler, should be a normal unsafe rust function
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/// body.
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/// body.
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///
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///
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/// Note that the interrupt handler would use the same stack as normal programs by default, so
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/// Note that the interrupt handler would use the same stack as normal programs by default.
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/// interrupt handlers should not return to normal program or it may corrupt the stack.
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macro_rules! interrupt_handler {
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macro_rules! interrupt_handler {
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($name:ident, $name2:ident, $stack0:ident, $stack1:ident, $body:block) => {
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($name:ident, $name2:ident, $stack0:ident, $stack1:ident, $body:block) => {
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#[link_section = ".text.boot"]
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#[link_section = ".text.boot"]
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@ -54,19 +55,27 @@ macro_rules! interrupt_handler {
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pub unsafe extern "C" fn $name() -> ! {
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pub unsafe extern "C" fn $name() -> ! {
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asm!(
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asm!(
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// setup SP, depending on CPU 0 or 1
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// setup SP, depending on CPU 0 or 1
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// and preserve registers
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"sub lr, lr, #4",
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"stmfd sp!, {{r0-r12, lr}}",
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"mrc p15, #0, r0, c0, c0, #5",
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"mrc p15, #0, r0, c0, c0, #5",
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concat!("movw r1, :lower16:", stringify!($stack0)),
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concat!("movw r1, :lower16:", stringify!($stack0)),
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concat!("movt r1, :upper16:", stringify!($stack0)),
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concat!("movt r1, :upper16:", stringify!($stack0)),
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"tst r0, #3",
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"tst r0, #3",
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concat!("movwne r1, :lower16:", stringify!($stack1)),
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concat!("movwne r1, :lower16:", stringify!($stack1)),
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concat!("movtne r1, :upper16:", stringify!($stack1)),
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concat!("movtne r1, :upper16:", stringify!($stack1)),
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"mov r0, sp",
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"mov sp, r1",
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"mov sp, r1",
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"push {{r0, r1}}", // 2 registers are pushed to maintain 8 byte stack alignment
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concat!("bl ", stringify!($name2)),
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concat!("bl ", stringify!($name2)),
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"pop {{r0, r1}}",
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"mov sp, r0",
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"ldmfd sp!, {{r0-r12, pc}}^", // caret ^ : copy SPSR to the CPSR
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options(noreturn)
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options(noreturn)
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);
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);
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}
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}
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#[no_mangle]
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#[no_mangle]
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pub unsafe extern "C" fn $name2() -> ! $body
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pub unsafe extern "C" fn $name2() $body
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};
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};
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}
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}
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