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Robert Jördens e7146cc999 gateware.spi: design sketch 2016-02-26 17:03:08 +01:00
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applets applets: workaround 'garbage on sides of embedded windows' bug on Windows 2016-02-21 21:32:21 +08:00
compiler transforms.llvm_ir_generator: use private linkage instead of internal. 2016-02-25 20:15:40 +00:00
coredevice Correctly display backtraces that contain inlined functions. 2016-02-24 17:44:19 +00:00
devices pdq2.mediator: minor tweaks 2016-02-24 18:11:05 +01:00
frontend artiq_run: allow running LLVM IR/bitcode files, even with trivial RPCs. 2016-02-24 22:50:45 +00:00
gateware gateware.spi: design sketch 2016-02-26 17:03:08 +01:00
gui gui: add logo to MDI area 2016-02-21 08:06:52 +08:00
language Rename 'with parallel' to 'with interleave' (#265). 2016-02-22 13:24:43 +00:00
master worker: print core device tracebacks. Closes #292 2016-02-25 01:25:26 +08:00
protocols protocols/pc_rpc: raise asyncio line length limit for client 2016-02-22 13:04:21 +08:00
runtime Take alignment into account during attribute writeback (fixes #293). 2016-02-25 01:44:05 +00:00
sim sim: align API closer to non-sim 2016-02-23 21:01:03 +01:00
test Commit missing parts of 919a49b6. 2016-02-25 20:02:31 +00:00
wavesynth coefficients: fix constant zero 2016-02-23 17:56:38 +01:00
__init__.py artiq_dir: move out of tools to unlink dependencies 2016-01-25 18:15:50 -07:00
_version.py versioneer: remote tag_prefix = v 2016-01-18 21:28:09 -07:00
experiment.py artiq.experiment: merge language and coredevice namespaces 2016-01-25 17:24:00 -07:00
tools.py tools/file_import: make sure sys.path is always restored 2016-01-31 20:33:17 +01:00