artiq/artiq/gateware/wrpll
morgan d5b1f04dcc Gateware: frequency multiplier for WRPLL
wrpll: add mmcm with DRP to generate 125Mhz refclk
2024-05-29 16:52:08 +08:00
..
__init__.py Gateware: si549 & WRPLL 2024-05-28 17:27:49 +08:00
ddmtd.py Gateware: si549 & WRPLL 2024-05-28 17:27:49 +08:00
si549.py Gateware: si549 & WRPLL 2024-05-28 17:27:49 +08:00
wrpll.py Gateware: frequency multiplier for WRPLL 2024-05-29 16:52:08 +08:00