artiq/artiq/examples/phaser
2016-10-12 16:13:34 +02:00
..
repository phaser: let link settle a bit longer before starting 2016-10-12 16:13:34 +02:00
device_db.pyon phaser: add sync ttl input for monitoring 2016-10-10 17:13:23 +02:00
idle_kernel.py phaser: add jesd204b rtio dds 2016-10-05 16:17:50 +02:00
startup_kernel.py Revert "phaser: 500 MHz dacclock" 2016-10-12 16:01:07 +02:00