forked from M-Labs/artiq
Robert Jördens
f754d2c117
* spimaster: (52 commits) runtime/rtio: rtio_process_exceptional_status() has only one user coredevice.spi, doc/manual: add spi kc705: move ttl channels together again, update doc runtime: rt2wb_input -> rtio_input_data examples/tdr: adapt to compiler changes bridge: really fix O/OE runtime: define constants for ttl addresses coredevice.ttl: fix sensitivity bridge: fix ttl o/oe addresses runtime: refactor ttl*() rtio: rm rtio_write_and_process_status coredevice.spi: unused import rt2wb, exceptions: remove RTIOTimeout gateware.spi: delay only writes to data register, update doc nist_clock: disable spi1/2 runtime/rt2wb: use input/output terminology and add (async) input examples: update device_db for nist_clock spi gateware.spi: rework wb bus sequence nist_clock: rename spi*.ce to spi*.cs_n nist_clock: add SPIMasters to spi buses ... |
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| .. | ||
| Makefile | ||
| conf.py | ||
| core_device.rst | ||
| core_drivers_reference.rst | ||
| core_language_reference.rst | ||
| default_network_ports.rst | ||
| developing_a_ndsp.rst | ||
| environment.rst | ||
| faq.rst | ||
| getting_started_core.rst | ||
| getting_started_mgmt.rst | ||
| index.rst | ||
| installing.rst | ||
| introduction.rst | ||
| management_system.rst | ||
| ndsp_reference.rst | ||
| protocols_reference.rst | ||
| release_notes.rst | ||
| utilities.rst | ||