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artiq
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6e67e6d0b1
artiq
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artiq
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gateware
/
serwb
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Florent Kermarrec
6e67e6d0b1
serwb: revert some changes (was breaking simulation)
2018-05-12 11:59:46 +02:00
..
__init__.py
gateware/serwb: SERWBPLL, SERWBPHY, SERWBCore and add checks in delay finding to verify the sampling window
2017-08-30 14:40:11 +02:00
core.py
serwb/core/phy: move scrambler in phy, add link test, revert delay min/max checks
2018-04-17 19:21:21 +02:00
etherbone.py
serwb: reduce buffering.
Closes
#997
2018-05-11 14:13:41 +08:00
kusphy.py
serwb: remove idelaye3 en_vtc (was not done correctly, we'll add direct software control)
2018-05-12 01:32:16 +02:00
packet.py
gateware/serwb: cleanup packet
2018-01-03 17:30:12 +01:00
phy.py
serwb: revert some changes (was breaking simulation)
2018-05-12 11:59:46 +02:00
s7phy.py
serwb: fix case when rtm fpga is not loaded, lvds input can be 0 or 1
2018-05-11 23:31:25 +02:00
scrambler.py
serwb/scrambler: dynamic enable/disable
2018-04-17 19:20:06 +02:00